Display unit and drive system thereof and an information display unit

ABSTRACT

In a display panel, a dummy pulse of a predetermined voltage signal is superimposed on a data signal and the dummy pulse has an amplitude much larger than the amplitude of the data signal, and thus a signal waveform applied to a light modulation layer such as LC layer is changed to a high frequency wave. The applying position of the dummy pulse is varied according to each color of R, G and B, or varied according to frame or field. By performing a MLS drive with the dummy pulse superimposed on the data signal, the amplitude difference between the selection signal and the data signal can be reduced. Thus, a common driver IC and a segment driver IC can be formed as one semiconductor chip to be placed on one side, constructing a three side free type.

TECHNICAL FIELD

[0001] The present invention relates to a display unit using a liquidcrystal display (LCD) panel and the like that can achieve a highlight-utilization efficiency in both a transparent mode and a reflectivemode, and to a driving system therefor, and further relates to aportable information terminal device such as a viewfinder, video camera,and a mobile or portable telephone.

BACKGROUND ART

[0002] Since LCD panels have the advantages of being slim and low powerconsumption, they are commonly used in many portable appliances such asword processors, personal computers and televisions, as well as theviewfinders and monitors of video cameras. In recent years, there hasbeen adopted a reflective-type LCD panel using external light as a lightsource in place of backlight.

[0003] However, in a display panel using a liquid crystal layer as alight modulation layer, there arises a problem that flickers aregenerated when a frame rate (i.e., frames number to be rewritten on adisplay screen per a second) is lowered. On the other hand, when a framerate is made higher to suppress the occurrence of flickers, the circuitscale of the display unit is increased to be a problem.

[0004] In a simple matrix type LCD panel, an amplitude of a commonselection signal for selecting a common driver IC is much larger than anamplitude of a segment data signal for a segment driver IC. Therefore,when a common driver IC and a segment driver IC are to be assembled asone semiconductor chip, it is necessary that a tolerance voltage of thesemiconductor chip must be matched with an amplitude of the selectionsignal. Accordingly, a high tolerance voltage processing is required asan IC process, and it was difficult in cost to combine a common driverand a segment driver as one semiconductor chip. This is because it wasdifficult to achieve a display panel having a construction of three freesides having no driver IC and only one side thereof formed with driverIC chip thereon.

[0005] Recently, information terminals of mobile or portable telephonesare progressing, and there is a demand for realizing a high quality orgood contrast display of a moving picture even in a mobile telephone. Inorder to achieve a high contrast display of a moving picture, the framerate must be made high. The frame rate is proportional to a powerconsumption, and the power consumption is increased when the frame rateis made high. However, suppression of power consumption is essentiallyrequired in a mobile telephone, and therefore there is a demand forrealizing both a good display of a moving picture and a low powerconsumption compatibly.

[0006] In a mobile telephone network, there is adopted a charge systemin which a charge for usage is decided in accordance with a datatransmission time or data transmission amount. Namely, it is requiredthat image data should be transferred in a short time with suppressingthe transmission data amount as small as possible. Moreover, when theimage data amount is increased, the circuit operation of a mobiletelephone is complicated and the power consumption is increased to beproblematic.

[0007] An essential object of the present invention is to provide adisplay device and driving system, construction and method solving theseshortcomings.

DISCLOSURE OF INVENTION

[0008] In order to achieve the object, in a display panel according tothe present invention, in consideration of a fact that flickers aregenerated when a data frame rate is lowered, a predetermined voltagesignal, namely, a dummy pulse having amplitude greater than an amplitudeof a data signal is superimposed on the data signal in synchronizationwith a selection signal, namely, a scanning signal. By applying thedummy pulse, the signal waveform to be applied to a light modulationlayer such as a liquid crystal layer is made high in frequency, and theflicker occurrence is remarkably suppressed.

[0009] The applying position of the dummy pulse on the data signal maybe varied according to each color of R, G and B. By this arrangement,the flicker occurrence can be more effectively suppressed. Also, byvarying the applying position of the dummy pulse in frames or fields,the flicker occurrence can be further effectively suppressed. Moreover,by adjusting the amplitude of the dummy pulse or varying the applyingposition thereof, the flicker can be further effectively suppressed.

[0010] The dummy pulses may be made continuous in applying positionbetween adjoining scanning lines, for example, between an even numberedscanning line and an adjoining odd numbered scanning line. By thisarrangement, the variation in amplitude of the data signal can bereduced and the power consumption can be accordingly reduced. Also, theamplitude or applying position of the dummy pulse may be adjusted orvaried, and by this arrangement, a luminance (i.e., brightness orcontrast) of an image can be easily adjusted.

[0011] According to another aspect of the present invention, regardinggradation data subject to a frame rate control (FRC), the firstgradation data may be comprised of common divisors of 12 and the secondgradation data may be comprised of common divisors of 8. By performing agradation display with the gradation data, the flicker occurrence can beeffectively suppressed. Also, a good display with a high contrast can becompatibly achieved both in display of a moving picture and a stillpicture.

[0012] A gradation selection circuit may be provided on each segment (orsource) signal line for selecting gradation data corresponding to imagedata based on the image data and output data of a gradation data shiftcircuit. Regarding gradation registers of the gradation data shiftcircuit, there is omitted a gradation register which can be formed bymirror reversion of the data, and the data of the omitted gradationregister is restored by reversing the data of the gradation data shiftcircuit in the gradation selection circuit. By this arrangement, thecircuit scale can be reduced to half and an IC chip size can be alsoreduced to thereby realize a reduction in cost.

[0013] In specific, in a simple matrix type LCD panel, an amplitude of aselection signal for a common driver IC is much larger than an amplitudeof a data signal for a segment driver IC. According to the presentinvention, a dummy pulse is superimposed on the data signal to therebycomparatively reduce the amplitude of the selection signal.

[0014] Moreover, by carrying out a multi line selection (MLS) drive tobe described later, the amplitude of the selection signal can be furtherreduced. By this arrangement, the amplitude difference between theselection signal and the data signal can be remarkably reduced.Accordingly, a circuit of a common driver IC and a circuit of a segmentdriver IC can be configured as one semiconductor chip. By forming thedriver IC circuits as one semiconductor chip, a display panel of aconstruction having three free sides can be easily achieved where onlyone side of the display panel is provided with the common and segmentdriver ICs thereon.

[0015] In mobile telephones and the like according to the presentinvention, in order to compatibly achieve both a good display contrastof a moving picture and a reduction in power consumption, the operatingclock for operating a circuit is gradually switched into a plurality offrequency levels. The frame rate is made high in a display of a movingpicture, and the frame rate is reduced to the lower limit in a displayof a waiting still picture. The switching of the clock in frequencylevels is performed using a microcomputer or a user switch device. Byswitching the circuit clock, the frame rate can be easily varied whilereducing the power consumption. Thus, both a good display of a movingpicture and a reduction in power consumption can be achieved compatibly.

[0016] In a mobile or portable telephone according to another aspect ofthe present invention, there is provided a means for implementing areverse dither process or reverse error diffusion process to the datasubjected to a dither process or an error diffusion process. There isfurther provided a means for implementing a dither process to the datasubjected to the reverse dither process. By this arrangement, theoptimum image processing can be performed to a display panel to therebyimprove the contrast properties in the gradation display.

[0017] In a data transmission method according to another aspect of thepresent invention, the data format transmitted to such as a mobiletelephone includes information of a number of colors such as 256 or 4096colors, frame rate, and image processing method such as a dither processwritten therein. The written data is reproduced by a mobile telephoneand the transmitted image is displayed on the display panel achievingthe optimum image display based on the written information.

BRIEF DESCRIPTION OF DRAWINGS

[0018] FIGS. 1(a) and 1(b) are respectively schematic plan and sectionviews of a display unit of the present invention;

[0019]FIG. 2 is an explanatory drawing of the display unit of thepresent invention;

[0020] FIGS. 3(a) through 3(e) are explanatory drawings of the displayunit of the present invention;

[0021]FIG. 4 is an explanatory section view of the display unit of thepresent invention;

[0022] FIGS. 5(a) to 5(c) are explanatory section views of the displayunit of the present invention;

[0023]FIG. 6 is an explanatory section view of the display unit of thepresent invention;

[0024]FIG. 7 is an explanatory section view of the display unit of thepresent invention;

[0025]FIG. 8 is an explanatory drawing of a drive system for the displayunit of the present invention;

[0026]FIG. 9 is an explanatory drawing of a drive system for the displayunit of the present invention;

[0027]FIG. 10 is an explanatory drawing of a drive system for thedisplay unit of the present invention;

[0028]FIG. 11 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0029]FIG. 12 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0030]FIG. 13 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0031]FIG. 14 is an explanatory drawing of a drive system for thedisplay unit of the present invention;

[0032]FIG. 15 is an explanatory drawing of a drive system for thedisplay unit of the present invention;

[0033]FIG. 16 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0034]FIG. 17 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0035]FIG. 18 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0036]FIG. 19 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0037]FIG. 20 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0038]FIG. 21 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0039]FIG. 22 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0040]FIG. 23 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0041]FIG. 24 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0042]FIG. 25 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0043]FIG. 26 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0044]FIG. 27 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0045]FIG. 28 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0046]FIG. 29 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0047]FIG. 30 is an explanatory table drawing of the drive system forthe display unit of the present invention;

[0048]FIG. 31 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0049]FIG. 32 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0050]FIG. 33 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0051]FIG. 34 is an explanatory table drawing of the drive system forthe display unit of the present invention;

[0052]FIG. 35 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0053]FIG. 36 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0054]FIG. 37 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0055]FIG. 38 is an explanatory table drawing of the drive system forthe display unit of the present invention;

[0056]FIG. 39 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0057]FIG. 40 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0058]FIG. 41 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0059]FIG. 42 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0060]FIG. 43 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0061]FIG. 44 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0062]FIG. 45 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0063]FIG. 46 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0064]FIG. 47 is an explanatory equation drawing of the drive system forthe display unit of the present invention;

[0065] FIGS. 48(a) to 48(c) are explanatory drawings of the display unitof the present invention;

[0066] FIGS. 49(a) and 49(b) are explanatory drawings of the displayunit of the present invention;

[0067]FIG. 50 is a schematic plan view of the display unit of thepresent invention;

[0068]FIG. 51 is a schematic plan view of the display unit of thepresent invention;

[0069]FIG. 52 is a schematic plan view of the display unit of thepresent invention;

[0070]FIG. 53 is a schematic plan view of the display unit of thepresent invention;

[0071]FIG. 54 is an explanatory drawing of the display unit of thepresent invention;

[0072]FIG. 55 is an explanatory drawing of the display unit of thepresent invention;

[0073]FIG. 56 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0074]FIG. 57 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0075]FIG. 58 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0076] FIGS. 59(a) to 59(c) are explanatory drawings of the drive systemfor the display unit of the present invention;

[0077] FIGS. 60(a) and 60(b) are explanatory drawings of the drivesystem for the display unit of the present invention;

[0078] FIGS. 61(a) to 61(c) are explanatory drawings of the drive systemfor the display unit of the present invention;

[0079] FIGS. 62(a) to 62(c) are explanatory drawings of the drive systemfor the display unit of the present invention;

[0080] FIGS. 63(a 1) to 63(a 3) and 63(b 1) to 63(b 3) are explanatorydrawings of the display unit of the present invention;

[0081] FIGS. 64(a) to 64(f) are is an explanatory drawings of thedisplay unit of the present invention;

[0082]FIG. 65 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0083]FIG. 66 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0084]FIG. 67 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0085]FIG. 68 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0086]FIG. 69 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0087]FIG. 70 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0088]FIG. 71 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0089]FIG. 72 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0090]FIG. 73 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0091]FIG. 74 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0092]FIG. 75 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0093]FIG. 76 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0094]FIG. 77 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0095]FIG. 78 is an explanatory drawing of the drive system for thedisplay unit of the present invention; and

[0096]FIG. 79 is an explanatory drawing of the drive system for thedisplay unit of the present invention.

[0097]FIG. 80 is an explanatory drawing of the display unit of thepresent invention;

[0098]FIG. 81 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0099]FIG. 82 is an explanatory graph view of the drive system for thedisplay unit of the present invention;

[0100]FIG. 83 is an explanatory graph view of the drive system for thedisplay unit of the present invention;

[0101] FIGS. 84(a) and 84(b) are explanatory drawings of the drivesystem for the display unit of the present invention;

[0102]FIG. 85 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0103]FIG. 86 is a block diagram of the display unit of the presentinvention;

[0104]FIG. 87 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0105]FIG. 88 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0106]FIG. 89 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0107]FIG. 90 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0108]FIG. 91 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0109]FIG. 92 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0110]FIG. 93 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0111]FIG. 94 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0112]FIG. 95 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0113]FIG. 96 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0114]FIG. 97 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0115]FIG. 98 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0116]FIG. 99 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0117]FIG. 100 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0118]FIG. 101 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0119]FIG. 102 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0120] FIGS. 103(a) and 103(b) are explanatory drawings of the drivesystem for the display unit of the present invention;

[0121]FIG. 104 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0122]FIG. 105 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0123]FIG. 106 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0124]FIG. 107 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0125]FIG. 108 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0126]FIG. 109 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0127]FIG. 110 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0128]FIG. 111 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0129]FIG. 112 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0130] FIGS. 113(a) and 113(b) are explanatory drawings of the drivesystem for the display unit of the present invention;

[0131]FIG. 114 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0132]FIG. 115 is an explanatory drawing of the drive system for thedisplay unit in the present invention;

[0133]FIG. 116 is a block diagram of the display unit of the presentinvention;

[0134]FIG. 117 is an explanatory circuit drawing of the display unit ofthe present invention;

[0135]FIG. 118 is an explanatory circuit drawing of the display unit ofthe present invention;

[0136]FIG. 119 is an explanatory table drawing of the display unit ofthe present invention;

[0137]FIG. 120 is an explanatory table drawing of the display unit ofthe present invention;

[0138]FIG. 121 is a block diagram of the display unit of the presentinvention;

[0139]FIG. 122 is a block diagram of the display unit of the presentinvention;

[0140]FIG. 123 is a block diagram of the display unit of the presentinvention;

[0141]FIG. 124 is a schematic drawing of an information terminal of thepresent invention;

[0142]FIG. 125 is an explanatory drawing of the information terminal ofthe present invention;

[0143]FIG. 126 is a schematic drawing of an information terminal of thepresent invention;

[0144]FIG. 127 is a section view for explaining the information terminalof the present invention;

[0145]FIG. 128 is an explanatory drawing of the information terminal ofthe present invention;

[0146]FIG. 129 is an explanatory drawing of a data transmission formatof the present invention;

[0147]FIG. 130 is an explanatory drawing of the data transmission formatof the present invention;

[0148] FIGS. 131(a) and 131(b) are explanatory drawings of the datatransmission format of the present invention;

[0149]FIG. 132 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0150]FIG. 133 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0151]FIG. 134 is an explanatory plan view of the display unit of thepresent invention;

[0152]FIG. 135 is an explanatory drawing of the display unit of thepresent invention;

[0153]FIG. 136 is an explanatory drawing of the display unit of thepresent invention;

[0154]FIG. 137 is an explanatory drawing of a part of the display unitof the present invention,

[0155]FIG. 138 is an explanatory drawing of a part of the display unitof the present invention;

[0156] FIGS. 139(a) to 139(c) are explanatory drawings of the datatransmission format of the present invention;

[0157]FIG. 140 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0158]FIG. 141 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0159]FIG. 142 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0160]FIG. 143 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0161]FIG. 144 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0162] FIGS. 145(a) to 145(c) are explanatory drawings of the displayunit of the present invention;

[0163]FIG. 146 is an explanatory drawing of the display unit of thepresent invention;

[0164]FIG. 147 is an explanatory table drawing of the drive system forthe display unit of the present invention;

[0165] FIGS. 148(a) to 148(d) are explanatory drawings of the displayunit of the present invention;

[0166]FIG. 149 is an explanatory table drawing of the display unit ofthe present invention;

[0167]FIG. 150 is an explanatory drawing of the display unit of thepresent invention;

[0168]FIG. 151 is a block diagram of a display unit of the presentinvention;

[0169]FIG. 152 is an explanatory drawing of the drive system for thedisplay unit of the present invention;

[0170]FIG. 153 is a graph view for explaining the drive system for thedisplay unit of the present invention;

[0171]FIG. 154 is an explanatory drawing of the display unit of thepresent invention;

[0172]FIG. 155 is a circuit drawing of a part of the display unit of thepresent invention;

[0173]FIG. 156 is an explanatory drawing of the display unit of thepresent invention;

[0174]FIG. 157 is a circuit drawing of a part of the display unit of thepresent invention;

[0175]FIG. 158 is a circuit drawing of a part of the display unit of thepresent invention;

[0176]FIG. 159 is a circuit drawing of a part of the display unit of thepresent invention;

[0177]FIG. 160 is a circuit drawing of a part of the display unit of thepresent invention;

[0178]FIG. 161 is a circuit drawing of a part of the display unit of thepresent invention;

[0179]FIG. 162 is a circuit drawing of a part of the display unit of thepresent invention;

[0180] FIGS. 163(a) and 163(b) are explanatory drawings of the displayunit of the present invention;

[0181]FIG. 164 is an explanatory drawing of the display unit of thepresent invention;

[0182]FIG. 165 is a graph view for explaining the display unit of thepresent invention;

[0183]FIG. 166 is an explanatory drawing of the display unit of thepresent invention;

[0184]FIG. 167 is a schematic view of an information terminal of thepresent invention;

[0185]FIG. 168 is an explanatory drawing of the information terminal ofthe present invention;

[0186]FIG. 169 is an explanatory drawing of the information terminal ofthe present invention;

[0187]FIG. 170 is a schematic view of the display unit of the presentinvention;

[0188]FIG. 171 is a section view of a part of the display unit of thepresent invention;

[0189] FIGS. 172(a) and 172(b) are explanatory drawings of the displayunit of the present invention;

[0190]FIG. 173 is a schematic perspective view of a video camera of thepresent invention;

[0191]FIG. 174 is a section view of a view finder of the presentinvention;

[0192]FIG. 175 is a section view of a view finder of the presentinvention;

[0193]FIG. 176 is an explanatory drawing of the view finder of thepresent invention;

[0194]FIG. 177 is an explanatory section view of the view finder of thepresent invention; and

[0195]FIG. 178 is a partial section view for explaining a display unitof the present invention.

BEST MODES FOR CARRYING OUT THE INVENTION

[0196] There are sections of this specification statement which havebeen abbreviated and/or scaled up or down to simplify the drawingsand/or to clarify the technical drawings. For example, in the LCD panelin FIG. 86, the 24 sections of the liquid crystal layer is clearlyindicated in the illustration. In FIG. 95, the phase film has beentruncated. The above points also apply to the technical drawings below.

[0197] Sections which refer to identical numbers and symbols haveidentical or similar embodiment or material, or alternatively functionor operation.

[0198] Unless otherwise noted, the content described by the technicaldrawings and so on can be integrated with other embodiments. Forexample, lighting systems and mirrors that reflect light can be added tothe display panels or the display units in FIG. 50, FIG. 1, and FIG. 6.Moreover, the display units in FIGS. 50, 1 and 6 can be utilized withthe liquid crystal television in FIG. 170. The display units in FIGS.50, 1 and 6 can also be utilized with the mobile telephones pictured inFIGS. 124, 126, 128 and 167. To put it briefly, the display panel itemsdescribed in the technical drawings and specification statement have notbeen described individually but, rather, can be mutually combined toform an embodiment configuration of the display unit. It goes withoutsaying that the base material in FIG. 162 can be used with the displayunits in FIGS. 50, 1 and 6.

[0199] In addition, FIGS. 86, 116 through 155 primarily describe thehardware for display units. The semiconductor circuits (IC chips madefrom silicon materials) needed to realize any subsequent hardware arealso within the technical realms of the present invention. FIGS. 85through 115 describe, principally, the drive system, but thesemiconductor circuits (IC chips made from silicon materials) needed torealize the drive system are, of course, within the technical realms ofthe present invention. To put it briefly, the production and retail ofthese IC chips based on the method developed here will violate thispatent.

[0200] Even if they are not exemplified in the specification statement,the matters, content and specifications explained or described in thespecification statement or in the technical drawings can be combinedwith one another and defined in the claim.

[0201] An explanation of the invention display panel and display unitwill be given below while referring to the technical drawings. In orderto simplify the explanations in the specification statement, the LCDpanels and display unit are described and illustrated with an example.However, the present invention is not restricted to just these items.Organic EL (OEL, OLED) and inorganic EL and other display panels orunits are also technical categories covered by this specificationstatement.

[0202] The present invention primarily pertains to simple matrix LCDunits or EL display units. In particular, it pertains to the drivesystems that simultaneously select multiple common signal lines (MLS:multi-line selection, and; MLA: multi-line addressing systems).

[0203] However, the present invention is not restricted to just theseitems. It is also well suited to the APT and IAPT drive systems and thevoltage oscillation system (A method whereby varying the basic electricpotential of the voltage efficiently impresses the voltage in the lightmodulation layer). It can also be applied to the PHM (pulse-heightresolution method) system.

[0204] In addition, the present invention can be applied to activematrix LCD units or EL display units. For example, for active matrix LCDunits or EL display units, instances where multi-contrasting isdisplayed can be illustrated by using the FRC (frame rate control)system and the analogue contrast display system. Loading IC 14 or IC 15onto one side of the display panel is illustrated in FIG. 1, and thetransmission systems are explained in FIGS. 131 and 139. The processingsystems and image display methods for image data are exemplified inFIGS. 132 through 144.

[0205] The active matrix type refers to one formed in each pixel by thinfilm transistor (TFT) switching elements. In addition to these thin filmtransistors, ring diodes, thin film diodes (TFD) and varistor elementscan also be used as switching elements. In other words, any plasmaaddressing system capable of changing the current impression conditionin the pixel is sufficient.

[0206] For the substrate 11 and 12 made from glass or organic materials,a striped electrode has been formed (not shown in the drawing). Sapphireglass, soda glass, lead glass, and quartz glass have been illustrated astypes of glass base materials. Among them, the good heat conductance ofsapphire glass base material makes it the preferred choice.

[0207] For substrate 11 and 12 made from organic material, (metal)plate, anything with a suitable surface and film are all acceptable.Materials made from epoxy resin, polyimide resin, acrylic resin andpolycarbonate resin have been illustrated. It is preferable that theboard thickness be 0.2 mm or greater and less than 0.9 mm.

[0208] When substrate 11 and 12 are a comparatively thick 0.5 mm to 1.0mm, a striped electrode or a TFT switching device is formed. The basethickness can then be reduced to 0.25 mm to 0.5 mm by chemical etchingor mechanical polishing technology.

[0209] At least one of substrate 11 and 12 should be opticallytransparent, and the other substrates can be constructed from silicon ormetals such as aluminum, copper and stainless steel. Resin film can alsobe applied to the metal substrate to form a composite board. By formingsuch a substrate, the heat release capacity of the board and thereliability of the display panel will improve.

[0210] Also, it can be constructed by fixing several layers of resinfilm or glass together. Part of or all of boards 11 and 12 are made fromcolored plastic. These boards are coated with a light dispersing agent.Improvements made by narrowing and widening the angle of view can bedone by forming convex and concave curves on 1556. The reflective filmwhich reflects incident light into the pixels is attached directly toboards 11 and 12.

[0211] The display panel becomes reflective when the reflective film isconnected to the pixel electrode. In case of having transparent type,the alignment of liquid crystal will change. A change in viewing anglebecomes apparent depending on the how small the bumps are on the surfaceof the ITO pixel. The reflection system recognizes images according tohow small is a reflective section part on a small metallic film and thebumpy section on the ITO pixel electrode. Thus even the display paneloperates normally outdoors or in strong sunlight.

[0212] The 561 pixel electrode of the reflective pixel that reflectstransmitted light can be made from aluminum, chrome, titanium, andsilver. It is also possible to use alloys of two or more metals such asaluminum and magnesium, aluminum and molybdenum, and aluminum andtitanium.

[0213] Scattering of transmitted and reflected light can be achieved byplacing a convex (or curve) surface 562 on the surface of pixelelectrode 561 (or striped electrode). The transmitted light is dispersedby 562 convex surfaces. (See FIG. 2)

[0214] Normally color filters are made from filters painted with lightscattering pigment resins. Pigments absorb long wavelengths of lightwhile being transparent to other long wavelengths. During ourdevelopment we added a light scattering agent of diameters between 0.2μm and 2 μm in the center of the color filters. We used titanium oxide,aluminum oxide, and opal glass as light dispersing agents. These agentsdisperse incident light coming into the filters. The Angle of viewchanges according to the amount of light dispersed. The color filters insubstrate boards 11 and 12 are made in one direction. Ideally colorfilters should be placed on top of the transparent electrode (pixelelectrode and the striped electrode.)

[0215] For the reflective pixel, the pixel electrode 561 is made usingthe spattering method by using a 200 nm aluminum film. The convexsection 562 is laid on the surface of the liquid crystal layer pixelelectrode 561. With a simple matrix type display panel a striped pixelelectrode is used. The convex surface 562 is not limited to being convexit can also be concave. The concave and convex sections can be made atthe same time. Light scattering agent can be placed on the upper andlower layer pixel electrode 561.

[0216] The ideal material used in the construction of the stripedelectrode pixel electrode is aluminum, but silver can also be used. TheITO is made from a conductive material. This gives the ITO itstransparent properties. Adjusting of the thickness of the aluminum filmeffects the transparent and reflection properties of the semitransparentfilm. Ideally the transparency rate of the semitransparent film shouldbe in the range of 10 to 30%.

[0217] One hole or many holes are made in the reflection film. That partof the film becomes transparent. The pixel electrode becomessemitransparent. The reflection film and semitransparent film becomes amulti-layer dielectric film.

[0218] Ideally the surface should be as even as possible when theelectrode (Striped and matrix pixel electrodes) is attached to thereflection film. The height of the convex section should be between 0.5and 1.5 μm thick. It is important that the insulation of the convexsection be uneven. Beads or titanium oxide should be mixed in with thematerials used when making the convex section. It can be formed bydirectly forming the convex section on the reflective film: This isoutlined in FIG. 2.

[0219]FIG. 3 shows the pixel electrode 561 (this includes the stripedelectrode) transparent light window open and the mechanism ofsemi-transparency. The diagonal line on every drawing is the transparentsection 571. An actual hole should be open in transparent section 571leading to reflection section 572. Fix the reflection electrode on topof the ITO transparent electrode.

[0220]FIG. 63(a) is an example of how a number of short transparentsections 571 are fixed on the reflection electrode. FIG. 3(c) shows onetransparent section 571. FIG. 3(b) shows a ring formed transparentsection 571. FIG. 3(d) shows a number of short transparent sections 571.

[0221]FIG. 3(e) shows a random (or comparatively random) array ofstripes (including the pixel electrode matrix) uneven surface 562. Itshows the convex section transparent section 571 and the concave or flatsection reflection section 572. The convex section is the transparentsection 571 and the concave or flat section is the reflective section.The converse is also possible. The transparency rate setting of thesemi-transparent film can be adjusted by varying the surface area of theconvex section in FIG. 3.

[0222] Making substrate boards 11 and 12 from sapphire glass improvestheir heat releasing properties. Making the films thicker or thinnerimproves heat convection. For example, a board made from a thin diamond(or DLC-diamond like carbon) film. Other examples include boards madefrom alumina or ceramics or metal boards made from steel. A metal filmis heat fixed onto the insulation film. Metallic coating can also beused.

[0223] It is without a doubt that plastic boards can also be used forthe substrate. Lightweight plastic boards are well suited for use inmobile phone displays. Please refer to FIGS. 2, 5, 6, and 7 forexplanations on the use of plastic boards.

[0224] The plastic boards were developed for liquid crystal displays, asshown in FIG. 4, are laminated boards. They are made by fixing thesupport board 322 to substrate 321 on one side. On the other side thesupport board 323 is fixed to substrate 321. Film between 0.05 and 0.3mm thick can also be used.

[0225] As shown in FIG. 5(a) ideally polyolefin resin is used in thesubstrate 321. An example of a polyolefin board is the ARTON 200 μmboard made by Japan Synthetic Rubber Co., Ltd.

[0226]FIG. 5(b) shows the heat resistance, the hard board layer'ssolvent resistance and moisture resistance and the polyester resin gasbarrier board's aerotolerence of the 321 substrate. It also shows thepolyethylene or polyester 322 support board (film or film).

[0227] On the other side of the 321 substrate is the hard coat layer(same properties as above) and the polyester resin gas barrier layer ofthe 323 support board (film or film). Ideally the 322 support board andthe 323 board optical lag axis angles should be set to 90 degrees. The321 substrate and the 323 support board are fixed together with adhesivebond.

[0228] Ideally a UV (ultra-violet light) hardened fluoro-acrylic resinadhesive should be used, but it is also possible to epoxy adhesive orbond with a refractive index between 1.47 and 1.54. It is desirable tohave the refractive index of board 31 below 0.03. It is especiallyimportant to coat the boards with a light dispersion agent such astitanium oxide before applying any adhesives.

[0229] When fixing the 322 and 323 support boards to the 321 substrate,the optical lag axis angle should be set an angle should be more than 45degrees and less than 120 degrees or preferable at angles between 80degrees and 100 degrees. At these angles the effect of phase differencecaused by the polyester 322 and 323 support boards is completely negatedin the laminated boards. The liquid crystal display panel plastic boardthen can be used as a non-phase difference isotropic board.

[0230] With this structure the non-phase difference film board and filmlaminated board become more versatile. Namely, it becomes possible tochange straight polarized light into elliptical polarized light bymodifying the film phase difference. If there is a phase difference inboard 11 etc. an error in the design setting will occur.

[0231] Here, as the hard coating layer, use epoxy, urethane, or acrylicresins may be used, and also the striped electrode and the pixelelectrode may share the role as the first under coat layer fortransparent electrical inductive film.

[0232] It is also possible to use such inorganic materials such as SiO₂and SiOx etc. and organic materials such as polyvinyl alcohol, andpolyimide as the gas barrier layers. The use of acrylic, epoxy resin,and polyester adhesives bonds is possible. Ideally the thickness ofadhesive should be less than 100 μm and the thickness of the unevensurface of the boards should be more than 10 μm.

[0233] The thickness of the 322 and 323 support substrates should bebetween 40 μm and 400 μm. If the 322 and 323 support substrates becomesless than 120 μm thick, it becomes possible to lower the risk of phasedifference that occurs when solvent seeps out at the polyethersulfoneresin dye-line. The ideal thickness for 322 support board is between 50and 80 μm.

[0234] In the laminated board the undercoat layer of the transparentelectrical inductive film is made from SiOx and as shown in FIG. 3101(c)the 325 transparent electric inductive film from ITO. It is made usingthe Spattering technique. By making display plastic board 325transparent electric inductive film in this fashion the film attains asheet resistance of 25 Ω/□ and a transparency rate of 80%.

[0235] If the 321 base substrate is between 50 and 100 μm thick, thedisplay panel plastic board will melt during heat treatment in themanufacturing process and the striped electrode ITO will crack. Thiscauses it to lose carrier ability, even if the circuits are connected.If one substrate is between 200 and 500 μm thick there will be no changein the board carrier ability. The transparent conductive film willremain stable. No problems will arise with the circuit connection. Thebest range of thickness is between 250 and 450 μm. This is due to havingthe moderate amount of flexibility and flatness.

[0236] The barrier layer that comes into contact with the liquid crystallayer should ideally be made from inorganic materials. The plasticsubstrate 11 is made from the same organic materials as mentioned above.The barrier layer made of inorganic materials should be identical to theAIR coat materials.

[0237] If the barrier film is made with a striped electrode ideallymaterials with a low inductive material should be used. This reduces theloss of amperage impressed on the liquid crystal optical module layer.Take for example a fluorinated amorphous carbon film (specific inductivecapacity of 2.0 to 2.5). JSR manufactures and sells the LKD-T200 series(inductive capacity of 2.5 to 2.7), the LKDT400 series (inductivecapacity of 2.0 to 2.2). The LKD series is made on a base of MSQ(methyl-silsesquioxane) and they have an inductive capacity ranging from2.0 to 2.7. Other recommended material includes organic polyimide,urethane, acrylic, and the inorganic SiN_(x) and SiO₂. No doubt usingthese materials in the barrier films of 32 and 33 support boards isrecommended.

[0238] As it was pointed out before the boards in FIGS. 4 and 5 theboards 11 and 12 shown in FIG. 1 have two merits; they don't breakeasily and they are lightweight. They can also be made by pressing. Theshape of the board can be chosen depending on whether the press or cutand plane processes are used. (See FIGS. 6 and 7) The shape and thethickness can be chosen according to what type of fusing and chemicalhandling method is employed. For example, it can optionally formed intoa circular, spherical, or conical shapes. It is possible to make theuneven 155 surface and the light dispersal surface at the same time whenmaking boards. It is easy to create a light dispersing surface on one orboth sides of the board when using chemicals.

[0239]FIG. 6 shows an example of how to determine the position of theholes in board 12 of the backlight by pushing in the 1552 pin whenpressing plastic boards. The 1552 pin is made to accurately put holes inboard 12. Backlight 186 can be made by polishing. The capacitor insidethe boards 11 and 12 is made from a circuit. It is possible to fix theconcave section of board 11 and the convex section of board 12 togetherby gently fitting them together.

[0240] Until now a lot of time was required to decide on a position andmake a module from the backlight and panel 21. In the present invention,considerable amount of time can be saved by simply installing pin 1552.The pin can be put into the backlight 1866 hole when making board 12.(There is no drawing illustrating this process.) The front light 1861can also be treated in the same way when making board 11. (See FIG.127.) One of the technical features we have invented is that a singleunit can be made by easily by aligning and fitting convex and concavesections into the concave and convex sections of boards 11 and 12. (Thealignment of positions can be easily done.)

[0241]FIG. 6 outlines the lighting steps of the backlight 1555 insert.When white LED, fluorescent lamp, the temperature sensor 1553 thatmeasures temperatures at different steps of luminescence is inserted tothe insert section 1556.

[0242] The brightness of the fluorescence lamp changes with thetemperature of the white LED. In the invention the electrical current inLED 1552 is controlled by temperature measurements made by temperaturesensor 1553. The sealing resin 1654 seals the surrounds of thetemperature sensor 1553 and LED 1552. This improves the transmission ofheat. If the 1556 sealing resin is colored and a light dispersion agentis added, color mottling is reduced in LED 1552. The color temperatureof the luminescence from LED 1552 should be adjusted.

[0243] Until now the areas surrounding of glass boards 11 and 12 weresealed off with sealing resin from the liquid crystal layer. The sealingresin had a convex structure and it was about 4 to 5 μm thick. Theconvex section was the same thickness as the liquid crystal layer. Itwas possible to make the convex section from this seal resin at the sametime when making substrate boards 11 and 12. The convex section 1634seal resin is made when boards 11 and 12 are being pressed. (See FIG.7.) This has a large effect when making boards 11 and 12 from resin. Acost reduction and time saving becomes possible when the resin sectionis made at the same time as the boards. The dot convex section 1634 ofthe display region section is made at the same time as the boards. Theconvex section 1634 is made in the space next to the pixels. An effectis exhibited in the convex section 1634 liquid crystal layer 1631according to the thickness of the film.

[0244] Normally resin or glass (or a substitute) beads are scattered inthe display region. This is because the thickness of the liquid crystallayer 1631 is predetermined for certain places. These beads have beenreplaced by convex section 1634 of boards 11 and 12. (See FIG. 7.)Boards 11 and 12 are made from resin. The convex section 1634 is pressedetc. from resin. Convex section 1634 is placed between pixel electrodes1633 and 1632. The dispersal of the beads is not necessary because ofthe thickness of the liquid crystal film 14 in FIG. 7 is a lowtemperature polysilicon driver circuit.

[0245] One is not limited to making the convex section 1634 from resinand beads. Usually part of the resin convex section is left as it is.The liquid crystal section (pixel section) is pressed and gouged. Theuneven section 1634 is made at the same time as the board. First thelevel board is made and when it is reheated then the uneven 1636 ismade.

[0246] The mosaic color filter is made by directly applying color to theboard. Pigments applied by ink-jet printing or painted on colors areleft to permeate the board. The board is then dried in a hightemperature dryer. The surface is then coated with materials like UVresin, or with the inorganic silicon oxides or nitrates. Also thephotogravure, offset and spinner printing techniques can be used. Usingthe technique in a similar way, the color filter can be formed throughthe semiconductor pattern technique. As well the color filter, the abovetechnique can be directly used to make the black matrix (BM). The blackmatrix is colored with black, dark colors, or adjusted lightcomplimentary colors. The concave section of the board surface is madein relation to the board surface pixels. A color filter, BM, or TFT isbuilt into the concave section. Ideally the surface should be coatedwith acrylic resin. The merit of such a structure is that the surface ofthe pixel electrode is leveled improving the alignment of the liquidcrystal molecules.

[0247] The conductor polymer causes the board surface resin to getelectrical conductive properties. The pixel electrode or the reverseelectrode is made directly onto the board. A hole is made in the board.Electronic parts such as capacitors are inserted into the hole. Then athinner board becomes possible.

[0248] A pattern of any design can be cut into surface of the board.(See 1556 in FIG. 7.) The seal opening of the liquid crystal is sealedby melting the resin on boards 11 and 12. The resin of surrounding areaof the board is melted and sealed to prevent water entering the organicEL display.

[0249] Forming the board from resin and following the above proceduresfacilitates making holes in boards. Pressing them make it possible toform into countless board shapes. Make holes in boards 11 and 12. Plugthe holes with inductive resin. This makes both the front and back ofthe board into electricity inductive. Now the multi-layer circuit boardsand both sides of boards 11 and 12 can be used. Inductive pins can beused instead of inductive resin. Connectors of electronic parts andcapacitors are pushed into the hole. Capacitors, coils, and circuitwiring of the thin film inside the board are made to be electricallyresistant. The multi-layer of boards 11 and 12 are use for electricalwiring. The board multi-layer is made fixing several thin boardstogether. More than one board (or film) layer can be colored.

[0250] Coloring and filtering can be done by applying pigments and dyesdirectly to the board. Serial numbers can be printed at the same time asthe boards are being made. To prevent malfunctions arising from problemsoccurring when IC chips are irradiated, only the areas outside thedisplay region are colored.

[0251] The display board can be colored with two different colors. Thisis done by applying resin board production techniques (such as injectionand complexion processes). The above techniques can also be used toproduce a display panel that has two different thicknesses of liquidcrystal layer films. It is possible to make the display and the circuitboard at the same time. The display area and driver boards can be easilychanged.

[0252] To explain in detail, it is possible to make small changes to thefilm thickness to center of one pixel and what it surrounds. Make smallquadrangular pyramid, triangular pyramid, or cone projections in boards11 and 12 (See 1634 a in FIG. 7(b)). The liquid crystal molecules alignthemselves with the projections as in 1634 a. The liquid crystal usesthe dielectric constant load and aligns the molecules. The impressionamperage controls the horizontal alignment of the liquid crystalmolecules in the board. At that time the liquid crystal molecules shouldbe aligned in a spiral pattern. This is realized when the directionalfilm is rubbed. The direction film applies direction in the board.Pixels are important parts of the liquid crystal. Surrounding the areaaround the pixels with resin is not difficult. Resin is placed aroundthe pixel. The resin controls the liquid crystal molecules.

[0253] A pixel or display region micro lens can be formed. A diffractionlattice is made when boards 11 and 12 are being produced. The size ofthe pixels determines how minute the irregularities there are on thesurface. (See FIG. 7(b) 1634 a; FIG. 7(a) 1556 a, etc.) Improvements onthe field of view angle and the preservation of the field of view angledependency can also be done. The production of such options, microproduction technologies and the micro lens developed by Omron has beenrealized because of the Stamper technology.

[0254] Striped electrodes (not shown in the drawing) are formed onsubstrates 11 and 12. An anti-reflection film (Air Coat) is molded onthe sides of the substrate, which comes in contact with air. In the casewhere no polarizing plate has been attached to substrate 11 and 12, theanti-reflection film (AIR Coat) is molded directly on substrate 11 and12. In the case where a polarizing plate (polarizing film) or othertypes of construction material are attached, then the anti-reflectionfilm is molded to the surface of such construction material.

[0255] Additionally, in order to suppress or prevent foreign particlesfrom bonding to the surface of the polarizing plate, the molding of athin film comprising of fluorocarbon resin is effective: For theprevention of electrostatic, either the depositing or coating ofconductive body film such as metallic film, conductive polymer film, ora thin film of the hydrophilic group is recommended.

[0256] Furthermore, the polarizing plate (polarizing film) which iseither molded or configured on the optic incidence or optic output ofthe display panel should not be limited to polarized linear light but itcan also be oval polarization. The use of an interlocking or gluedtogether attachment of deflecting plates and wave plates, or the gluingtogether of multiple numbers of polarizing plates can also be done.

[0257] TAC film (triacetylocellulose film) is the most appropriate asthe main material for the composition of the deflecting film. This isbecause TAC film contains superior optical characteristics, a smoothsurface and manufacturing suitability.

[0258] The AIR Coat is illustrated by the example of its composition inwhich single or multiple layers of dielectric film are molded.Otherwise, it is possible to possible to coat the substrate using amaterial with a low refraction rate of 1.35 to 1.45; for example afluorochemical based acrylic resin. Materials with refraction ratesbetween 1.37 to 1.42 have particularly favorable properties.

[0259] The Air Coat is constructed as either a bi-layer or triple-layercoat. The triple-layer coat is used to prevent reflection in wavelengthsthat have a wide spectrum of visible light. This is called a Multi-coat.The bi-layer coat is used to prevent reflection in wavelengths that havea certain spectrum of visible light. This is called a V-Coat. TheMulti-coat and V-coat are used respectively in accordance with theapplication. Furthermore, it is also possible to use single-layers andnot limit use to bi-layers or above.

[0260] The Multi-coat is formed by laminating aluminum oxide (Al₂O₃) ofnd=λ/4, zirconium (ZrO2) at nd1=λ/2, and magnesium fluoride (MgF₂) atnd1=λ/4 as the optical film thickness. Normally, the thin film is formedwith the λ at 520 nm or a value within that proximity.

[0261] The V-coat is formed by laminating silicon monoxide (SiO) atnd1=λ/4 and magnesium fluoride (MgF₂) at nd1=λ/4, or yttrium oxide(Y₂O₃) and magnesium fluoride (MgF₂) at nd1=λ/4 as the optical filmthickness. In the instance where the blue light is to be modulated dueto the existence of an absorption band on the blue light side, the useof Y₂O₃ is preferred. In terms of substance stability, also, Y₂O₃ is themore stable than others making it more favorable. Another alternative isthe use of SiO₂ thin film. Naturally, it can be used as an AIR coat byusing resin with a low refraction rate such as is illustrated in theexample of acrylic resins such as fluoros. If using these types,ultraviolet curing types are more favorable.

[0262] Furthermore, in order to prevent the display panel from beingcharged with electrostatic, coating the surfaces of the display panel 21and the conductive light board in the front light etc., with ahydrophilic resin is recommended. Additionally, in order to preventsurface reflection, an embossing finish may be applied to the frontlight conductive light board and/or the surface of the substrate (1556 aand 1556 b of FIG. 7). It should be noted that the embossing finishrefers to all processes to ensure the prevention of reflection oralterations of the view angle or improvements of the view angle.

[0263] Striped Electrode is the generic term for electrodes of aspecific length. However, it is not limited in definition tobrachymorphic shapes. This actual panel invention is mostly abrachymorphic combination of striped electrodes. Accordingly, theStriped can have circular, curved, irregular shaped or transformationalcomponents within it. The pixel electrodes distributed in the matrix arealso striped electrodes because they are brachymorphic.

[0264] As shown above, to simplify the explanation of the presentinvention, the display panel, the explanation is given using a simplematrix-type liquid display panel or a display device as the illustratedexample. However, the materials and construction can also be applied toactive matrix-type liquid display panels, organic (inorganic) EL displaypanels, PLZT display panels and fluorescent character display panels.

[0265] As shown in FIG. 1, a common driver (COM-IC) 15 and a segmentdriver (SEG-IC) are loaded above the display panel 21 through chip-onglass technology (COG). Metal wiring such as silver, aluminum and chromewiring is used for the data wiring due to the thinness of the wiringwidth and the low-resistance achievable. The wiring is a material usedto construct the reflection film for pixels, so it is preferable thatthe wiring is formed at the same time as the reflection film as it is asimple process.

[0266] The present invention is not limited to COG technology. It canalso be used with configurations that connect with the signal lines ofthe display panel 21 by loading the above-mentioned driver IC ontochip-on film (COF). Additionally, the driver IC can be a 3-chipconfiguration by creating a separate IC power source.

[0267] TCF tape can also be used in the mounting of the IC chip.Polyimide film and Cu foil can be thermo compressing bonded on the filmsuitable for the TCF tape without using adhesive bond. Other methods forthe film suitable for the TCF tape besides that of applying Cu topolyimide film without adhesive bonding include the method of castmolding by superimposing melted polyimide on top of the Cu foil. Anothermethod is to apply the Cu on top of metal film molded by sputtering ontop of the polyimide film by coating or deposition. Each of thesemethods is fine with the method of using TCP tape that has Cu applied tothe polyimide without using adhesive bond being the most preferable. Cucoated laminated sheets with no adhesive bond are used for lead pitchesof less than 30 μm. Among the Cu coated laminated sheets that do not useadhesive bond, the method by which the Cu layer is molded by coating ordeposition is effective for the miniaturization of the lead pitch due tothe fact that this method is suited to Cu layer thinning.

[0268] A color filter is either formed or constructed on the top orbottom layer of the striped electrode. Furthermore, forming of a blackmatrix (referred to as BM herewith), made from chrome or black colorresin, in between the color filters is advisable in order to preventcontrast reduction due to light escape from the pixels or the mixture ofcolors of the color filter.

[0269] The color filter is made so that it can either respond to theprimary colors of yellow (Y), mazenda (M) and cynaogen (C) or red (R),green (G) and blue (B) so that it can respond to all pixels. The planarlayout includes mosaic sequence, delta sequence and strip sequence.

[0270] Color filters that can be used other than the color filter madefrom a resin that is dyed in acrylic and gelatin include a color filterformed by a multiple layer dielectric film and a color filter through ahologram. Another appropriate color filter is the selective reflectiontype composed of a layer of colestric liquid crystal. Additionally, theliquid crystal layer can be substituted by direct tinting. For example,if it is PD liquid crystal, a composition that tints the resin and/or acomposition that distributes the color within the liquid crystal are twoillustrations of this. Another option is to use the use the liquidcrystal in the guest host mode.

[0271] Furthermore, the color filter is not limited to 3 colors. It canbe a single color, two colors or even four or above. For example, acombination of six colors such as red (R), green (G), blue (B), cynaogen(C), yellow (Y), and mazenda (M). Additionally, the color filter is notlimited to transmission methods. It can also be used as a reflectiontype formed by a multiple layer dielectric film as well as a simplereflection method.

[0272] When making a color filter with multiple layer dielectric film,the optical multiple layer film should be formed on whether the top orbottom of the striped electrodes. The color filter that has multipledielectric layers is one which is made so that it has prismaticcharacteristics for a specific sphere through the laminating of multiplelayers of dielectric film of both high and low refraction rates.

[0273] The Black Matrix (BM) is primarily used in order to prevent lightescaping between the electrodes (striped electrodes and pixelelectrodes). BM forms an isolation layer between the electrodes andstriped electrodes (not displayed) and can be formed with either a metalfilm such as chrome (Cr) or with a resin composed of an acrylic resinwith carbon or the like added to it.

[0274] Other possible materials for the film include optic-dispersingmaterials such as black metal like sexivalent chrome, coatingcompositions, materials, thin or thick film forming microscopicconvexo-concaves on the surface, titanium oxide, aluminum oxide,magnesium oxide and opal glass. Additionally, not only dark or blackcolored materials, but also materials with tinted colors or pigmentsconnected to complementary colors in relation to the light in whichoptic modulation layers modulate are acceptable. Holograms anddiffraction gratings are also acceptable.

[0275] Black glass beads, black glass fiber, black resin beads or blackresin fiber are used to suppress the film thickness of the modulatorlayer in the liquid crystal. In particular, black glass beads and blackglass fiber are high in optical absorption and due to their hardness,they are preferable because of the low number of pieces dispersed in theliquid crystal layer.

[0276] Liquid crystal materials used in the liquid crystal layer includeTN liquid crystal, STN liquid crystal, strong dielectric liquid crystal,strong anti-dielectric liquid crystal, guest host liquid crystal, OCBmode (Optical compensated Bend Mode) liquid crystal, smectic liquidcrystal, colestric liquid crystal, IPS (In Plane Switching) mode liquidcrystal and high particle dispersing liquid crystal (referred to as PDherewith). Furthermore, in the case where a movie display is not vital,the use of PD liquid crystal is preferable from the viewpoint of opticaluse efficiency. Also, in the case of still picture display beingprimarily used, the use of TN liquid crystal or STN liquid crystal ispreferable.

[0277] It is possible to use TN liquid crystal in the liquid crystallayer, however STN liquid crystal is substantially better. Using liquidcrystal with at least 100 scanning electrodes and a liquid crystaldispersing torsion angle of 180 to 360 degrees in the liquid crystallayer is effective. Most preferable is a torsion angle of between 230 to280 degrees. Furthermore, it is possible to use a mixture of variouspublicly known varieties of liquid crystal materials for the compositionof liquid crystal matter. If required, other non-liquid crystalmaterial, color, chiral agent, and other additives can be added andused.

[0278] As shown above, in the liquid crystal cells filled with liquidcrystal, deflection film, wave plates and deflecting film are alsoplaced if required. In particular, in the present invention, theaddition of such materials is suitable in the case of conducting agradation (or tonal) display having contrast properties by means of atime-sharing drive of more than {fraction (1/100)} duty as well as forthe STN-type liquid crystal display arrangement that requires a torsionangle of 180 to 360 degrees. Additionally, it is also suitable forSTN-type liquid crystal display arrangements for both black and white aswell as color displays in which the compensating liquid crystal cellsand the wave plates are laminated together in the STN-type liquidcrystal cell.

[0279] Deflection plates with a resin film in which iodine is added topolyvinyl alcohol (PVA) resin is illustrated as an example. Deflectionplates which use isolated pairs of polarized light are comparativelyinferior in terms of use efficiency of light due to the fact that theyisolate polarized light through the absorption of deflection fractionsin the given axis of deflection of the incident light and those of froma different direction. Here, it is appropriate to use reflectivepolarizers which split the deflection by reflecting the deflectingfractions moving in the given axis direction and those going in adifferent direction. If configured in this way, the use efficiency oflight is enhanced through the reflective polarizers making a brighterdisplay than the example of using deflecting plates mentioned abovepossible.

[0280] As a method of isolating of polarized light, other usablematerials in addition to this type of deflecting plate and reflectivepolarizer include a combination of colestric liquid crystal layers and(¼)λ plates; separation of reflective polarizer and polarized lighttransmission by using the Brewster angle; use of holograms; use ofpolarizer beam splitter (PBS) etc.

[0281] One or more sheets of phase film (phase plate, phase rotationmethod, wave plate, wave film) is placed between the polarizing plateand the substrate 11 and 12 (not illustrated). The use of polycarbonateas the wave film is preferable. The wave film turns the incident lightinto outgoing light and contributes to the efficient running ofmodulation.

[0282] Other materials that can be used as phase film include polyesterresin, PVA resin, polysulphon resin, polyvinyl chloride resin, zeonexresin, acrylic resin, polystyrene resin and other organic resins ororganic films. Another possible alternative is rock crystal. Thepreferred setting of the phase difference of one phase plate is above 50nm and below 350 nm in a uniaxial direction, or more preferable is above80 nm and below 220 nm.

[0283] It is also possible to color part or all of the phase films orelse give part or all of it diffusion functions. Again, another suitableprocess is to emboss the surface, or form a reflective protection filmto prevent reflection (refer to FIG. 6 and 1556 or FIG. 7). Anothersuitable process is to bring out the benefits of improved contrastthrough the protection of halation or the tightening of the black pitchlevel in the display picture by forming an optic absorption film orlight shielding film in places where no harm will be done or not ofbenefit to the picture display.

[0284] Additionally, it is a good idea to form micro-lens to the matrixthrough the format of bumps on the surface of the phase film. Themicro-lenses are placed such that they can respond to either the 3primary color pixels or one pixel electrode. Naturally, it is alsopossible to place one of the micro-lenses onto a multiple number ofpixels.

[0285] Furthermore, the functions of a change in phase difference thatthe phase film creates can be applied to the color filter. For example,it is possible to create phase differences by making sure they occur ina certain way through the polymerization of light or by adjusting thecolor filter when molding.

[0286] Yet another possibility is to stimulate a phase differencethrough the polymerization of resin which is molded or coated on theside facing the optic modulator such as liquid crystal. By configuringin such a way, there is no need to construct or place phase film outsideof the substrate, making the configuration of the display panel easierand reductions in cost possible.

[0287] Furthermore, these procedures also apply to polarizing plates. Arear light, 1866, is placed at the back of the liquid crystal displaydevice. A front light can be placed on it also. Naturally, fluorescentcylinders, LED, organic or inorganic EL light sources and conductivelight board combinations for lighting are possible also. External light(e.g. the sun etc.) can also be used as a source of light by trappingthe light with the conductive light board. A transparent touch switchcan be attached to the display panel.

[0288] As shown in FIG. 162, a COM Driver (COMIC or Scanning Driver IC)15 and a SEG DRIVER 14 (SEGIC or Signal Driver IC) are placedsurrounding the display part 107 of the display panel 21. The COM Driveroutputs a selected voltage. Generally, a COM Driver refers to thescanning driver in the simple matrix-type liquid crystal display panel.In an active matrix-type liquid crystal display panel, it is oftenreferred to as a Gate Driver.

[0289] However, in this specification, use of these drivers is notlimited to one or the other. The SEG Driver outputs a picture signal.Generally, a SEG Driver refers to the Signal Driver in the simplematrix-type liquid crystal display panel. In active-type matrix liquidcrystal, it is often referred to as a Source Driver. However, in thisspecification, use of these drivers is not limited to one or the other.

[0290] As shown above, in order to make the display panel instructionsof the present invention easy, the simple matrix-type liquid crystaldisplay panel and devices are used as illustrative examples. However,the materials and configuration etc. can also be applied to fluorescentcharacter display panels, PLTZ display panels, organic or inorganic ELdisplay panels and active matrix-type liquid crystal panels.

[0291] Furthermore, from the perspective of reducing power consumption,it is advisable to install memory to the SEGIC. Needless to say, anexternally attached type with its memory inside the controller is alsopossible.

[0292] With the STN type, a conventional line sequential multiplexdriver is used for large capacity displays. At the same time asselecting each row of electrodes in sequence, this method also selectsthe columns of electrodes in response to the pattern wanted to bedisplayed. When all rows of electrodes are selected, the screenfinishes.

[0293] With the line sequence driver method, as the display capacityincreases, it is a known fact that the problem called Frame Responseoccurs. In the line sequence drive method, a voltage that is relativelylow when unselected and relatively high when selected is applied to thepixels. In general, the voltage variation increases as the number ofcolumn lines increase (the higher the duty drive). For this reason, whenthe voltage is small, the liquid crystal that responded to the voltageeffective value, then starts to respond to the impressed waveforms.

[0294] Simply put, Frame Response is a phenomenon, which causes areduction in contrast. This is the result of the reduction of theselected pulse and an increase in the rage of frequency transmission inOFF mode due to the large amplitude in the selected pulse.

[0295] In order to suppress the occurrence of frame response, theshortening of the selected pulse frequency by increasing the number offrame frequency waves is a well-known method. However, it has a largefault. That is, if the frame frequency is increased, then the impressedwaveform frequency spectacles increase causing an unevenness in thedisplay. Therefore, there is a limit to the frame frequency upper limitsin order to prevent the selected pulse from becoming too narrow.

[0296] To solve this problem without increasing the frequencyspectacles, the present invention uses a multiline simultaneousselection method, which selects multiple numbers of color electrodes(selected electrodes) at the same time. It selects a multiple number ofrow electrodes simultaneously and individually controls the columndisplay pattern. This method enables the frame cycle to be shortenedwhile maintaining the selected width at a certain point. Therefore, ahigh contrast display that controls the frame response is possible.

[0297] In the simple matrix-type liquid crystal panel, the use of liquidcrystal display materials that have a fast speed of response (under 100msec) is desirable. However, by increasing the response speed of theliquid crystal, the so-called ‘frame response’ phenomenon occurs,inviting with it problems such as the deterioration in contrast andflicker.

[0298] One known way of solving such problems is the conventionaltechnology known as MLS-Multiline Select, which simultaneously selects amultiple number of scanning electrodes. A brief outline of the MLS Drivemethod, which selects 4 electrodes simultaneously (abbreviated below toMLS4), follows. The explanation centers on MLS4, but the presentinvention is not limited to this method. For example, drive methods suchas MLS2, which selects 2 electrodes simultaneously, or MLS8, whichselects 8 electrodes simultaneously, can also be used. It goes withoutsaying, however, these fundamental technology ideas can be applied toFRC, PCM and PWC drives also.

[0299] For ease of explanation, FIG. 8 presupposes the situation of 8scanning electrodes with an orthogonal function of H, which representsthe driving pattern of the scanning electrodes. In the orthogonalfunction of H, rows respond to time and columns to the scanningelectrodes. The numeric value of 1 represents a straight polarityselected signal, −1 a negative polarity selected signal, and 0, anon-selected signal.

[0300] In this example, if V is the reference voltage and a is the biasratio, then for example, the first row vector (1,1,1,1,0,0,0,0) incontrast to the time at 1 and the virtual earth electrode potential (0)indicates an application as follows:

[0301] 1^(st) Scanning Electrode . . . negative selected signal (−aV)

[0302] 2^(nd), 3^(rd), 4^(th) Scanning Electrode . . . straight selectedsignal (+aV)

[0303] 5^(th), 6^(th), 7^(th), 8^(th) Scanning Electrode . . .non-selected signal (0)

[0304] Additionally, the second row vector (0, 0, 0, 0, −1, 1, 1, 1)with the time at 2, indicates an impress of

[0305] 1^(st), 2^(nd), 3^(rd), 4^(th) Scanning Electrode . . .on-selected signal (0)

[0306] 5^(th) . . . negative selected signal (−aV)

[0307] 6^(th), 7^(th), 8^(th) Scanning Electrode . . . straight selectedsignal (+aV)

[0308] Next, the one certain signal line and picture data arepresupposed at (−1, 1, 1, 1, −1, 1, −1, 1). In this picture data, thenumeric value of 1 represents OFF and −1 ON.

[0309] Therefore, the following signal line picture data shows that:

[0310] 1^(st), 5t, 7^(th) Scanning Lines . . . ON

[0311] 2^(nd), 3^(rd), 4^(th), 6^(th), 8^(th) Scanning Lines . . . OFF

[0312] The accumulation of the rows and columns of the orthogonalelectrode picture data are the drive patterns that should be impressedon to the signal electrode as is illustrated in FIG. 9.

[0313] Using the MLS4 method, the results taken of the rows and columnscalculation is any of the numeric values of 4, 2, 0, −2, −4.Furthermore, the reference voltage is set at V and the values arelabeled as 2V, V, 0, −V, −2V so as to respond and output to the signalline.

[0314] In the above example, the calculated results are (4, 2, 0, 2, 0,−2, 0, −2). Therefore, the drive pattern of the signal electrode is:

[0315] Time 1 . . . 2V

[0316] Time 2 . . . V

[0317] Time 3 . . . 0

[0318] Time 4 . . . V

[0319] Time 5 . . . 0

[0320] Time 6 . . . −V

[0321] Time 7 . . . 0

[0322] Time 8 . . . −V

[0323] In general, in the case of the MLS drive, if L equals thesimultaneously selected number of electrodes, the reference voltage ofthe signal electrodes, it becomes apparent that the values of −(L/2) V,−(I/2−1)V, . . . −V. 0, +V . . . +(L/2−1)V (L+1) are required (forexample, when there are 5 reference voltages in the case of MLS4).

[0324] The requirements of the differences in the applied voltage of thescanning and signal electrodes of the above example are shown in FIG.10. Using the above mentioned method in requirement for the effectivevalue voltage to be applied, for example, on the first scanning line,then the result is FIG. 11.

[0325] At the same time, by requiring the application of the effectivevalue voltage on each line produces FIG. 12. Coordination of the ON/OFFconnection, as shown in FIG. 13, with the effective value voltage, the1^(st), 5^(th) and 7^(th) scanning lines are ON and the 2^(nd), 3^(rd),4^(th), 6^(th), and 8^(th) scanning lines are OFF, and synchronizingwith the signal line picture data (−1, 1, 1, 1, −1, 1, −1, 1) aspresupposed at the beginning.

[0326] However, if the number of simultaneously selected electrodes ismade larger using this multiline select (MLS) driver method, the drivevoltage amplitude impressed on the scanning side will decrease. However,it is known that the drive voltage amplitude impressed on the signalside will increase. The reasons for this are explained as follows.

[0327] For ease of explanation, the same situation is presupposed as inthe above conventional example, with the orthogonal functionrepresenting the scanning electrode drive pattern as H, with 8 scanningelectrodes as N and 4 simultaneously selected electrodes as L. Requiringthe drive waveform with certain signal lines an ALL ON pattern (−1, −1,−1, −1, −1, −1, −1, −1) and others an ALL OFF pattern (1, 1, 1, 1, 1, 1,1, 1) shows the following findings.

[0328] The ALL ON pattern is shown in FIG. 14 and the ALL OFF pattern inFIG. 15. Simply put, because the calculated result of the ALL ON patternis (2, −2, −2, −2, −2, −2, −2), a −V voltage is continuously output bythe signal line and the calculated result of the ALL OFF pattern is (2,2, 2, 2, 2, 2, 2, 2) a V voltage is continuously output by the signalline.

[0329] Accordingly, the drive waveform of the signal and scanning line 1is as is shown in display 129. However, in display 129, the number ofscanning electrodes indicated has been expanded from 8 to the general Nnumber. From FIG. 16, the effective value voltage give in FIG. 17 can befound. If N=8, then it matches with the effective value voltage of theON/OFF results calculated in the conventional example.

[0330]FIG. 17 is the result in the case of the simultaneously selectedelectrodes being L=4. However, if the number of simultaneously selectedelectrodes is L, then it is known that the ON/OFF effective valuevoltage is supplied using the method in FIG. 18.

[0331] Furthermore, it is also know that that the method in FIG. 18 willnot rely on the orthogonal pattern if it is a Hadamard matrix. From theabove method, the ON/OFF ratio becomes that of FIG. 19. If the functionwithin the square root is the differential by α, then the results becomethat of FIG. 20.

[0332] When the numerator in FIG. 20 method starts from 0, and the biasratio is N^(1/2)/2, the ON/OFF ration reaches its largest number that isshown in FIG. 21.

[0333] Next, the necessary drive voltage amplitude is required for thesignal and scanning line drives in the most suitable bias conditions(a=n^(1/2)/2) using the MLS drive.

[0334] The setting must be that of FIG. 22 as the effective valuevoltage of the OFF pattern must be set to the liquid crystal thresholdvoltage of Vth. In particular, if the most suitable bias α=n^(1/2)/2 isused, then the reference voltage is supplied in FIG. 23.

[0335] On the signal line side, a drive voltage of between (−L/2V) to(+L/2V) is required. On the scanning line side, a 2aV drive voltage isrequired at −aV to +aV, and so for the most suitable bias, the amplitudeof the drive on the signal side is that shown in FIG. 24 and the driveon the scanning drive is that shown in FIG. 25.

[0336] In other words, the drive amplitude of the signal line sideincreases at a ratio of L^(1/2) on the scanning drive side (L refers tothe number of simultaneously selected electrodes).

[0337] From FIG. 24, in particular, if the most probable number ofsimultaneously selected electrodes to be used is L=4, then the signalline drive amplitude required will be 5.6V in the case of the number ofscanning line electrodes being N=160 and the liquid crystal thresholdvoltage being 1.9V. When considering the margin etc in the most wellused 5V process (largest guaranteed voltage is 5.5V) after being madeinto IC, these values seem almost impossible.

[0338] The only methods available are to either increase the number ofscanning electrodes (N) or lower the voltage (threshold), in order tolower the drive amplitude on the signal side.

[0339] However, by increasing the number of scanning line electrodes(N), the ON/OFF ratio is reduced which means an inadequate contrast isreceived affecting the picture quality. Additionally, by reducing theliquid crystal threshold voltage, the liquid crystal response speedbecomes slow which in turn affects movie displays.

[0340] In order to achieve the above-mentioned objective, the drivemethod employed in the present invention's simple matrix-type displaypanel finds the effective value voltage applied in the pixels andincreases them by impressing a dummy pulse (set amplitude/width pulse)to the scanning and signal electrodes.

[0341] Through this method, the reduction in power consumed can beachieved at the same time as lowering of the drive width of both thesignal and scanning lines in comparison to the conventional multilineselect drive. The production of IC in the low-pressure tolerance processin which the process unit is low is made possible.

[0342]FIG. 26 indicates the signal waveform of each scanning line inresponse to the 1251 orthogonal function supplied when the number ofscanning lines is N=160. 1252 represents the selected signal which isimpressed onto the scanning electrode and 1253 the dummy pulse which isimpressed onto the scanning electrodes.

[0343] In FIG. 26, one frame is comprised of the 1^(st) to 4^(th)subframes using the MLS4 method. In each subframe, every 4^(th) scanningline has the selected signal 1252 impressed in accordance with theorthogonal function of 1251. For example, in the 1^(st) subframe, theimpressed selected signals are +aV in scanning line 1, −aV in line 2,+aV in line 3 and +aV in line 4 (V refers to the reference voltage and ato the bias ratio).

[0344] As shown in FIG. 26, the dummy pulse 1253 impressed in thescanning lines of the present invention are impressed at a set pulsewidth and the same voltage values as the selected signal by allselective signals in each scanning line.

[0345] Next, in FIG. 27, the connection between the drive waveforms ofthe signal line and the signal waveforms of the scanning lines is shown.In this drawing, 1252 represents the scanning line, 1261 the signal linedrive waveform, 1252 a the scanning line dummy pulse and 1253 b thesignal line dummy pulse.

[0346] The scanning line indicates the signal waveform of therepresentative scanning lines of 1, 5 and 9. Furthermore (a) refers tothe ALL ON pattern and (b) to the ALL OFF pattern of the signalwaveform. In the ALL ON pattern, the drive signal of the signal line isV and in the ALL OFF pattern, the drive signal is +V.

[0347] The dummy pulse 1253 b on the signal line of the presentinvention is impressed at the exact same pulse width and timing as thescanning line dummy pulse 1253 a. Additionally, the voltage value of thedummy pulse 1253 b impressed in the signal line uses a reference voltageof (L/2) V which is derived from a polarity with multiple selectedsignals of scanning electrodes and the opposite polarity (L is thenumber of simultaneously selected electrodes).

[0348] In the scanning line signal waveform shown in FIG. 26, there isone negative polarized selected signal and three straight polarityselected signals with L=4 using the MLS4 method. Therefore, the voltagevalue of the dummy pulse 1253 b impressed onto the signal lines uses areference voltage of −2V as shown in FIG. 27.

[0349] In FIG. 27, when the canning line selected signal pulse width isstandardized to one pulse and the dummy pulse width is set at x pulse,the effective value voltage of the ALL ON and ALL OFF patterns becomesthat of FIG. 28. Furthermore, N equals the number of scanning line, athe bias ratio and V the reference voltage.

[0350] From FIG. 28, the ON/OFF ratio and reference voltage V aresupplied in FIG. 29. On the signal line side, −2V to +2V, totaling 4V ofdrive voltage, is required, and on the scanning side, −aV to +aV,totaling 2V of drive voltage is required. Therefore, the connectionbetween the ON/OFF ratio and the signal and scanning side tolerancevoltage to the dummy pulse width is as is shown in FIG. 30 (bias ratioa=6, number of scanning lines N=160, threshold value voltage Vth=1.9)

[0351] From FIG. 30, when the dummy pulse is set, the necessarytolerance voltage on both the signal and scanning sides decreases andthe longer pulse width is made, the further it decreases. In particular,if the dummy pulse width is set at 0.2, the tolerance voltage on thesignal side drops below 5V making 5 v process applications such as the0.35 μm process possible. However, in comparison to the case where thevalue (1.082) when the dummy pulse is not impressed, the value decreasesto 1.052.

[0352] Using FIG. 31, the following explanation covers the state ofother embodiments of the present invention. This drawing, as in FIG. 27also, 1252 represents the scanning lines selected signal dummy pulse,1261, the signal line drive waveform, 1253 a, the scanning line dummypulse and 1253 b, the signal line dummy pulse.

[0353] As shown in FIG. 31, the scanning line dummy pulse 1253 a ischaracterized as being added to the scanning line as a second dummypulse width, 1253 c, with the exact same timing and pulse width as 1253b which is impressed onto the signal line, not only for a selected timein the scanning line, but also for a non-selected time.

[0354] The reference voltage of V, which is the voltage value with thesame polarity as that of the larger polarity of the scanning lineselected signal, is used as the voltage value of the second dummy pulseof the scanning line (L equals the number of simultaneously selectedlines).

[0355] In this embodiment, there are three straight polarity selectedsignals and one negative polarity selected signal. Therefore, thevoltage value of the second dummy pulse 1253 c added to the scanningline is the +V reference voltage used as shown in FIG. 31.

[0356] In FIG. 31, the effective voltage values for the ALL ON and ALLOFF patterns are those shown in FIG. 32. In this case, N=the number ofscanning lines, a=the bias ratio and V, the reference voltage.

[0357] The ON/OFF ratio and reference voltage V would be supplied by theequation in FIG. 33 by FIG. 31. On the signal line side, −2V to +2V,totaling up to 4V of drive voltage is required, and on the scanningside, −aV to +aV, totaling 2aV of drive voltage is required. Therefore,the connection between the ON/OFF ratio and the signal and scanning sidetolerance voltage to the dummy pulse width x is as is shown in FIG. 34(bias ratio a=6, number of scanning lines N=160, threshold value voltageVth=1.9)

[0358] From FIG. 34, when the dummy pulse is set, the necessarytolerance voltage on both the signal and scanning sides decreases andthe longer pulse width is made, the further it decreases. In particular,when the dummy pulse width is set at 0.075, the tolerance voltage on thesignal side drops below 5V making 5V process applications such as the0.35 μm process possible. Furthermore, in embodiment 1, the ON/OFF ratiowas 1.052, but in this embodiment it was found to have improved to1.058.

[0359] Using FIG. 35, the following explanation covers the state ofembodiment 3 of the present invention. In this drawing, 1252 representsthe spanning lines selected signal, 1261, the signal line drivewaveform, 1253 d, the scanning line dummy pulse and 1253 e, the signalline dummy pulse.

[0360] In embodiment 3 of the present invention, as is shown in FIG. 35,the dummy pulse 1253 d impressed onto the, scanning line, ischaracterized by the fact that the straight polarity (+aV) selectedsignals are applied at a certain pulse width to all scanning lines atonce each time all of the scanning lines have been scanned (sub-frame).

[0361] The dummy pulse 1253 e on the signal line of the presentinvention is impressed at the exact same pulse width and timing as thescanning line dummy pulse. Additionally, the voltage value of the dummypulse impressed onto the signal line uses a reference voltage of (L/2) Vwhich is derived from a polarity with multiple selected signals ofscanning electrodes and the opposite polarity (L is the number ofsimultaneously selected electrodes): In this embodiment, L=4, so thereference voltage of −2V as indicated in FIG. 31 is used.

[0362] Furthermore, although not indicated in FIG. 35, the dummy pulsepolarities of the scanning line and signal line are inverted at acertain frequency.

[0363] In this case the effective voltage values of ALL ON and ALL OFFpatterns are that of FIG. 36. N equals the number of scanning lines, aequals the bias ratio and V the reference voltage. From the systemmentioned above, the sub-voltage and ON/OFF ratio are supplied by usingthe method in FIG. 37.

[0364] On the signal side, a drive voltage of up to 4V, from −2V to +2V,is required and on the scanning side, −aV to +aV, in total 2V of drivevoltage is required. Therefore, the connection between the ON/OFF ratioand the signal and scanning side tolerance voltage to the dummy pulsewidth x is as is shown in FIG. 38 (bias ratio a=6, number of scanninglines N=160, threshold value voltage Vth=1.9).

[0365] From FIG. 38, when the dummy pulse is set, the necessarytolerance voltage on both the signal and scanning sides decreases andthe longer pulse width is made, the further it decreases. In particular,when the dummy pulse width is set at 0.4, the tolerance voltage on thesignal side drops below 5V making 5V process applications such as the0.35 μm process possible. Furthermore, the ON/OFF ratio, which was 1.058in embodiment 2, was found to have improved in this embodiment to 1.061.

[0366] As shown above, according to the drive method of the simplematrix-type display panel through the multiline select drive (MSL) whichis the present invention's dummy pulse impressed onto the scanning andsignal electrodes, it is possible to reduce the tolerance voltagerequired by the scanning and signal drive circuits. As a result, ICdesign by a conventional low tolerance voltage process becomes possible.In turn, this makes the realization of low power consumption and costreduction possible. From this, it is found that the practical benefitsare large.

[0367] At this point, further explanation regarding other embodiments ofthe present invention will be give with reference to the technicaldrawings. The impression of a dummy pulse produces benefits in terms ofreducing common voltage. Other benefits include an improvement indisplay picture quality. By impressing the dummy pulse at a certainvoltage value and the same pulse width to all signal electrodes, and notjust the signal voltage, improvement of display picture quality can beachieved. The most significant improvement is a reduction in flickering.

[0368] In FIG. 39, the drive waveforms of the present invention areshown. As is indicated in FIG. 26, reference numeral 1252 represents theselected pulse in the scanning line by the scanning signal. If thereference voltage is V and the bias ratio is a, the signal voltageduring the selected length is a straight polarity (+aV) or negativepolarity −aV. It is 0 during the non-selected length. Additionally, 1261represents the signal voltage in the signal line. When the scanningsignal is a straight polarity selected signal, the signal voltage is ONat the negative electrode (−V) and OFF at the straight electrode. Whenthe scanning signal is a negative polarity selected signal, the signalvoltage is OFF at the straight polarity (+V) and OFF at the negativepolarity electrode. 1253 refers to the dummy pulse. The dummy pulse 1253is impressed at the same timing, pulse width (x) and voltage value toeach signal line. By adjusting the voltage value and pulse width x of1253, the effective value voltage applied to the liquid crystal changes.Additionally, the timing for the application of the dummy pulse is in anoptional position of the 1 horizontal scanning time period.

[0369] Furthermore, in the specifications, the illustrated examples ofthe optic modulator can be applied to plasma displays (PDP) and organicEL (OLED) and meets the conditions in the embodiment mentionedpreviously. Also, same thing can be said as in above for the followingembodiments.

[0370] In this way, if the dummy pulse 1253 is impressed at the sametiming, pulse width and voltage value, there is no difference ofvoltages between each signal line. This means that the interaction foundby the integration of the floating capacity formed between each signalline disappears. Also, the occurrence of display irregularities andvertical lines can be reduced. Furthermore, there is a visualimprovement in display picture quality because the signal voltage is setat a high frequency. In other words, it produces benefits in thereduction of cross talk and flickering.

[0371] By setting the dummy pulse 1253 to the same value of the scanningline selected signal, the reduction of the ON/OFF ratio of the effectivevalue voltage impressed onto the pixels of the LCD panel can besuppressed immensely.

[0372]FIG. 40 indicates the drive waveform of the present invention inother embodiments. The dummy pulse 1253 is applied to each signal lineat the exact same voltage value, pulse width and timing. The voltagevalue is set at the same value as the scanning line selected signal. Bydoing so, the padding of the effective value through the dummy pulse1253 is gone. Accordingly, the reduction of the ON/OFF ratio of theeffective value voltage impressed onto the pixels of the LCD panel canbe suppressed immensely. Also, because the signal voltage applied to theliquid crystal display layer is set at a high frequency, a reduction inflickering can be achieved, producing an improvement in display picturequality.

[0373] In other embodiments of the present invention, the simplematrix-type display panel containing multiple scanning and signalelectrodes is applied to the Multiline Select (MLS) drive method throughthe simultaneous selection of L amount scanning electrodes. Either theFrame Rate Control (FRC) method or Pulse Width Modulator (PWM) method isused as the contrast display method. By applying the dummy pulse 1253 tothe signal electrode, the reference voltage V decreases and the picturedisplay quality improves.

[0374] As explained previously, in the MLS method, which simultaneouslyselects L number of scanning electrodes, the scanning signal becomes1/{square root}{square root over ( )}L times, the data signal {squareroot}{square root over ( )}L times that of the conventional APT drivemethod. For that reason, the bias ratio of the scanning and signalelectrode voltages decrease in size and the effects the signal electrodevoltage has on the effective value voltage has is large in comparison tothe APT drive method. As a result, if there are waveform irregularitiesor interference in the signal electrode voltage series, the affectsplaced on the display quality are larger compared to conventionalmethods.

[0375] In the present invention, when the dummy pulse is impressed ontothe signal electrode, the same effective value voltage is applied to theliquid crystal even if the reference voltage V of the signal electrodevoltage is reduced. This means a lower signal voltage is achieved,reducing the affects on picture display quality, thus producingimprovements.

[0376] In other embodiments of the present invention, the dummy pulseapplied to the signal electrode using the MLS drive method ischaracterized by the fact that the amplitude value is set at the samevalue as the largest value of the signal electrode voltage and also thatits polarity opposes the polarity of scanning line with larger selectedsignal.

[0377] In FIG. 41, the drive waveform pattern of the present inventionis indicated. The scanning lines here represent the signal waveform oflines 1 to 8. In this drawing, the number of straight polarity selectedsignals in the 4 scanning lines simultaneously selected is 3. There isone negative electrode selected signal. Accordingly, the impressed dummypulse 1253 is set at 2V, the largest amplitude of the signal electrodevoltage it is a negative electrode.

[0378] When impressing the dummy pulse 1253 at this setting, theeffective value voltage is applied to the liquid crystal at its mostefficient rate, there enabling the reference voltage V of the signalelectrode voltage to be lowered. In turn, the affects on the picturedisplay quality are softened meaning an improvement.

[0379] In another embodiment of the present invention the timing of theimpression of the dummy pulse is set at the beginning of end of 1horizontal scanning period, which then suppresses the increase in powerconsumption.

[0380]FIG. 42 shows the drive waveforms of the present invention. Asthis drawing shows, by impressing the dummy pulse 1253 at the end of onehorizontal scanning period (or beginning), the amount of signal voltagechange decreases and enables the suppression of an increase in powerconsumption by the segment driver IC. It also makes the lowering of thereference voltage V of the signal voltage possible. As a result, theaffects on the picture display quality are softened meaning animprovement.

[0381] In another embodiment of the present invention the timing of theimpression of the dummy pulse is characterized by being alternativelyset at the beginning and end of one horizontal scanning period at eachsub frame.

[0382]FIG. 43 shows the drive waveforms of the present invention. Bychanging the timing of the impression of the dummy pulse 1253 at eachsub frame, the time in which it doesn't interfere is irregular, and sothe display picture quality can be improved. Therefore, by setting thetiming of the impression of the dummy pulse at the start or end of onehorizontal scanning period alternatively, the suppression of increasesin power consumption continue, in turn enabling the realization of anhigh-grade display picture quality.

[0383] In another embodiment of the present invention, the ON/OFF ratioapplied to the display panel pixels of the above a when the bias ratiois a and the number of scanning lines is N, is set in relation to FIG.44 as a dummy pulse width ratio x (0<x<1) in the one horizontal periodimpressed onto the signal electrode. This is done in order to secure aneffective value voltage.

[0384] In FIG. 41, when making the dummy pulse width ratio x in relationto the one horizontal period of the scanning line selected signal, theeffective value voltage of the ALL ON and ALL OFF pattern becomes therelationship shown in FIG. 45. Furthermore, N=the number of scanninglines, a=the bias ratio and V=the reference voltage.

[0385] From FIG. 45, the reference voltage V and ON/OFF ratio issupplied using the method shown in FIG. 46. From FIG. 46, the dummypulse width ratio x, which enables the maintenance of the above a in theON/OFF ratio, is supplied using the method shown in FIG. 44.

[0386] Furthermore, it is preferable to set the effective value voltageof the ON/OFF ratio applied to the LCD panel pixels at above 1.05 (1.065or above is even better) as the pulse width for the impressed dummypulse in the signal electrode. According to this drive method, evenimpressing a dummy pulse on the scanning and signal electrodes, theON/OFF ratio is adequately secured, meaning that there is no concern ofcontrast deteriorating.

[0387] Another effective process as a contrast display method contrastis to adjust the dummy pulse width in the 8-color, 256-color and4096-color display modes when using the FRC method. In the framemodulator method, the larger the contrast numbers, the more theinterference due to the integration of stray capacitance formed betweeneach signal line, making it easy for vertical lines and irregularitiesto occur. At this point, when there is a large amount of contrastnumbers, the occurrence of vertical lines and irregularities issuppressed by extending the dummy pulse width. When the amount ofcontrast numbers is small, an excellent display picture quality can beobtained by shortening the dummy pulse width and increasing thecontrast.

[0388] Additionally, in the case of a 16 contrast display using PWM, thepreferred dummy pulse width is {fraction (1/16)} the horizontal period.When using the pulse width modulator method to conduct 16 contrastdisplay, the pulse width is classified as 1,2,4,8 giving a 15 pulsewidth overall. Through the creation of a one horizontal period byincreasing clocks, it becomes 16 clocks, so at 15 pulses one clock isleft over. By using the remaining one clock in the dummy pulse, the onehorizontal period can be configured as a hexadecimal counter. Therefore,at the same time as being able to reduce the size of the circuit scalewithout requiring extra circuits, improvement in display picture qualitycan also be made.

[0389] Furthermore, it is advisable to configure it in such a way thatthe RGB gamma curve can be compensated by changing the amplitude orpulse width of the dummy pulse in each of the colors of red, green, andblue. Generally in the case of reflective panel, the voltage-reflectancecharacteristic varies between red, green, and blue, and especially, thethreshold voltage at which the reflectance shows up differs. At thatpoint, when width x of each red, green, and blue dummy pulse are setwith each threshold voltage Vth accordingly, as in FIG. 47, against thereference voltage, y curve of RGB can be corrected.

[0390] The following is a summary of the contents explained above aswell as supplementary explanation in order to explain the hardwareconfiguration.

[0391] In order to show the voltage size of the signal line in FIG. 27,the segment signal was explained as +2V, +V, 0, −V, −2V (V referring tothe unit voltage). +2V is the straight polarity and is twice the +Vvoltage. However, when explaining hardware, it is easier to understandby using symbols rather than the size of the voltage. Accordingly, fromhere on+2V voltage is V2, +V voltage is V1, 0 voltage is VC, −2V is MV2and −V is called MV1 (or explained by thus renaming the figures).

[0392] The common signal was also explained with the bias ratio as a,+aV,0,−aV. From this point on, the +aV voltage will be referred to as V4and the −aV as MV3.

[0393] In the explanation of FIGS. 26 and 35, the writer explained it interms of switching regarding the dummy pulse 1253, common signal 1252,or dummy pulse 1253 and segment signal 1261 (please refer to FIG.48(a)). However it is not limited to these. For example, as shown inFIG. 48(b), the segment signal (or common signal) 1261, the dummy pulse1253 can be arranged to be mounted. Also, as shown in FIG. 48(c), thesignal 1261 and dummy pulse 1253 can be switched gradually with norestrictions.

[0394] As shown in FIG. 49(b), in order to impress the dummy pulse 1261so that the ON/OFF ratio (contrast) is not changed, part of theeffective voltage on the signal should be controlled so that it becomesthe effective value voltage of the dummy pulse 1253. In other words,this can be done by configuring the dummy pulse 1253 with the reducedeffective value (a+b)×d coming about from making the signal 1261 in150(a) effective value voltage that of 150(b), i.e. (a+b)×c. Byimpressing the dummy pulse in this way, high picture quality withabsolutely no change in the display panel contrast can be maintained.

[0395] In the liquid crystal layer, the transmission rate of the liquidcrystal changes according to the effective voltage value. Through theapplication of the dummy pulse 1261, the transmission rate of the liquidcrystal changes if the effective voltage value does. The effectivevoltage value is determined by the dummy pulse 1253, the segment signal1261 and the common signal 1252.

[0396] The increase in the effective voltage value due to theapplication of the dummy pulse 1253 can be canceled by lowering theeffective voltage value of the common signal 1252. Normally, the commonsignal 1252 amplitude value is high. The adjustment of the increasedeffective voltage value due to the application of the dummy pulse 1253using the common signal 1252 means that the amplitude value willdecrease.

[0397] Accordingly, the common signal 1252 can be lowered through theapplication of the dummy pulse 1253. For that reason, it then becomespossible to reduce the tolerance voltage of the common driver IC15. As aresult, cost reductions are achievable as the IC can be made using alow-tolerance voltage, low-cost semi-conductor process.

[0398] The benefits of reducing the common voltage also appear in thereduction of unwanted electromagnetic radiation. Such reduction benefitsare large, particularly in the use of mobile telephones. This is due tothe interfering noise created if the unwanted electromagnetic radiationenters the circuit with a the mobile telephone wave processor set at ahigh frequency.

[0399] When the display panel 21 is used as an information displaydevice in mobile telephones, it is best to mount drivers IC14 and IC15on—side of the display panel as shown in FIG. 1 (the mount of the ICdrivers in—side is referred to as 3sidefree configuration).Conventionally, the common driver IC 15 is mounted in the X side of thedisplay area and the segment driver IC14 in the Y side). The design issuch that it is easy to make the center line of the screen 107 thecenter of the display device. Also, this is because the mount of thedriver IC is simple.

[0400] However, if the common driver 15 is placed to the side of thesegment driver 14, the common signal line 205 needs to be molded in linewith side C and formed to the screen display area 107 (refer to FIGS. 50and 53).

[0401] Also, the pitch of the common signal line 205, which is molded toC side, is set at above 5 μm and 12 μm. If the level is under 5 μm,noise remains due to the influence of the parasitic capacitance theadjoining common signal line. According to experiments, the influence ofthe parasitic capacitance occurs at pitch levels under 7μ and picturenoise such as beats occur on the display screen.

[0402] The occurrence of noise is different at the right and left of thescreen which makes it especially difficult to reduce the beat picturenoise. Also, if the reduction exceeds 12 μm, the width of the screenframe becomes too large and impracticable.

[0403] In order to reduce the picture noise mentioned above, a gruntpattern (a conductive pattern set at a electric potential which isstable at fixed voltage) is placed at the bottom or top layer of thepart forming the common line 205. Also, a separately attached sealedboard ca be placed on top of the common signal 205 (sealed foil [aconductive pattern set at a an electric potential which is stable at afixed voltage])

[0404] The common signal line 205 of C side in FIG. 1 can be formed byITO electrodes. To create low resistance, it is advisable to mold withmetallic film or laminate with an ITO and metallic film mix. Whenlaminating with ITO, a titanium film is formed on top of the ITO. On topof that a thin alloy film of molybdenum and aluminum or just aluminum ismolded. Another alternative is to mold a chrome film on top of the ITO.IN the case of metallic film, aluminum thin film or chrome thin film isused. The above-mentioned contents are the same for other embodiments inthe present invention.

[0405] Furthermore, by reducing the voltage in common signal 1252, thetolerance voltage used moves close to the segment signal 1261. In theMLS drive method, the segment signals and common signals, in particular,are characteristically close. The width is close meaning that thetolerance voltage of the semi-conductor IC chips for the common driverIC 15 and the segment driver IC14 are close. If the tolerance voltage isclose, it is possible to mold both drivers on one chip simultaneously(see FIG. 53).

[0406] In FIG. 53, the common driver IC 15 and the segment driver IC 14are made from silicon semiconductor wafers into 1-chip driver (IC 14 a),and are mounted to the display panel 21. This method can reduce thenumber of the chips that is to be mounted to the display panel. At thesame time, The voltage for various processing in the 1-chip driver IC.

[0407] In the past paragraph it is mentioned that the common driver IC15 and the segment driver IC 14 are made from silicon semiconductorwafers into 1-chip driver (IC 14 a), and that they are mounted to thedisplay panel 21. However, this is not the limit as the wafers can bemolded directly onto display panel 21 using high or low temperaturepoly-silicon technology.

[0408] The above explanation not only applies to the MLS drive, but canalso be applied to display panels that implement other driver methodssuch as the PCM drive and the PWM drive. It also applies to activematrix-type display panels, not only simple matrix-types.

[0409] The above explanation was done taking a simple matrix-typedisplay as example. However, the scope is not limited, needless to say,to this; the principle can be applied to active matrix-type displaypanels. All that needs to be done is to replace the common driver IC15with a gate signal line. The benefits through the reduction of the gatesignal amplitude are parallel. As a result, this drive method, which isimpresses the dummy pulse and 3-sidefree configuration, can be appliedto all display panels.

[0410] As shown in FIG. 56, there is also the benefit of being able toreduce flickering by impressing the dummy pulse 1253. The breakthroughof this mechanism is difficult, however it is possible to attribute thisto the following reasons.

[0411] The signal amplitude for the dummy pulse 1253 is comparativelylarge (using MV2 or V2). The number of high cycle components in thesignal impressed in the signal line 206 is higher. For that reason, thenumber of high cycle components in the signals impressed in the liquidcrystal layer increases and responds faster. Furthermore, the effectivevoltage value supplied to the liquid crystal layer by the dummy pulse iscomparatively large. Also the dummy pulse 1253 is applied evenly overthe entire screen.

[0412] In the STN LCD panel, the amount of cross talk changes due to thesignal frequency components impressed onto the segment signal. However,when a dummy pulse is impressed, the frequency components across theentire screen become even. Also, it becomes harder for cross talk tooccur due to the fact that the effective value voltage is relativelylarge. As a result, a high grade of picture quality and evenness can beachieved.

[0413] As FIG. 57 illustrates, fixing the direction of the voltageapplied is of benefit even if the signal 1261 changes. Generally, in theSTN LCD panel, when the frame lowers, it becomes easier for lowfrequency flickering to occur due to the difference in low frequencycomponents (change in brightness which is under 10 Hz and relativelyslow).

[0414] The low frequency flickering can be controlled by impressing adummy pulse 1253. By doing so, the occurrence of flickering under 40 Hzcan be prevented. It is presumed that the reason is due to the dummypulse 1253 being impressed evenly across the entire liquid crystallayer, which then causes the application of high frequency components.If a low frame rate can be achieved, then low power consumption can berealized.

[0415] Furthermore, in order to prevent the occurrence of low frequencyflickering at a low frame rate (under 30 Hz), the impression position ofthe dummy pulse can be changed as shown in FIG. 58. However, as theideal impression position of the dummy pulse 1253 differs depending onthe liquid crystal material, it requires the user to look at the picturewhile adjusting. In experiments, an excellent result was obtained in thecase when the dummy pulse 1253 was applied in the center of onehorizontal scanning time period using liquid crystal material with aresponse time of 200 to 300 msec. The best results were achieved withthe range above 0.5 but under 0.75 with the center measuring 0.5 and theone horizontal scanning time period being 1.

[0416] Also, for extremely slow frame rates of under 25 Hz, the positionof the dummy pulse 1253 can be moved in either A or B direction manuallyin response to the picture type (8-color font display, nature or person)to the position where flickering decreases (see FIG. 58). Adjustment ispossible by the user through the pressing of the information displayunit button 256. Another method is to adjust it automatically throughthe control by microcomputer after detecting flickering using thephoto-sensor etc. Yet another way to reduce flickering is by alteringthe width of the dummy pulse shown in FIG. 58. This can be done bypressing of the information display unit button 256 as well as adjustingit automatically through the control by: microcomputer after detectingflickering using the photo-sensor etc as mentioned above

[0417] As FIG. 59 illustrates, flickering is reduced also by changingthe position of impression of the dummy pulse 1253 at each field (orframe F). In FIG. 59, the dummy pulse is impressed in the middle of 1Hin the first F. In the second F, it is impressed at the end, and in the3^(rd) F, at the beginning of 1H. At the 4^(th) F, it then returns tothe center of 1H.

[0418] As stated above, by changing the position of the dummy pulse 1253impression at each field (frame), high frequency components are appliedto the liquid crystal layer, and the signals impressed on the liquidcrystal layer are randomized. As a result, low frame drive is realized.

[0419] The control of the waveform change ratio can be done by makingthe dummy pulse 1253 continuous at the adjoining horizontal scanningperiods (1^(st) and 2^(nd) periods) as shown in FIG. 60. At the 1^(st) Hperiod, a dummy pulse 1253 b is impressed at the end, and at the 2^(nd)Hat the beginning. In this way, if the dummy pulse 1253 is impressed thechanges in the signal, which are impressed on the signal line 206, willbecome lower. If the change decreases then low power consumption becomespossible. Again, as shown in FIG. 60(b), if the dummy pulse impressedcan be reversed either at 1H scanning time or multiple scanning times,then a high frequency voltage is impressed onto the liquid crystal layerenabling the suppression of flickering.

[0420] Furthermore, by using red, blue and green to change the positionof the dummy pulse 1253 impression, as shown in FIG. 61, is beneficialin suppressing the occurrence of flickering. RGB pixels are formedadjacent to one another, because they wipe out the flickering.

[0421] In FIG. 61, the position of the R & B pixel dummy pulse 1253impression is the same and only the G pixel pulse is positioneddifferently. Naturally, it is possible to make the R & G pixels the sameposition and change the B pixel position, or as shown in FIG. 62,position all three pixel dummy pulses in different places.

[0422] LCD panels, including STN LCD panels, differ in electric opticalcharacteristics (gamma characteristics) in red, green and blue. Inparticular, in the STN LCD pixel, if the film phase compensation is notperfectly in sync in RGB, due to the fact that oval polarized lightbecomes linear polarized through the film compensations the gammaproperties curve being uneven.

[0423] The synchronization of this gamma properties curve is indeedextremely difficult. In the present invention, as shown in FIG. 61, thedummy pulse 1253 is impressed to the segment signals. The effectivevalue applied to the segment signal lines by adjusting the voltage (oradjusting the pulse width and amplitude value) of the dummy pulse ineach of the colors R, G and B is changed. Accordingly, theelectro-optical characteristics (gamma characteristics) can be adjustedat R, G or B through the dummy pulse 1253.

[0424] The gamma compensation dummy pulse 1253 is applied to at leastone of the R, G or B signals. By doing so, the impressed signal gammaproperties are changed. Furthermore, the RGB gamma properties can besynchronized by adjusting the compensation amount.

[0425] As FIGS. 63(a 1), (a 2) and (a 3) illustrated, the high frequencycomponents are impressed onto the liquid crystal layer by making changesat each field (frame). The signal that is impressed onto the liquidcrystal layer is randomized. Therefore, low frame drives becomepossible. In the same way, the high frequency components are impressedonto the liquid crystal layer by altering the dummy pulse gradually, asshown in 152(b 1) (b 2) (b 3). Additionally, the signal that isimpressed onto the liquid crystal layer is randomized.

[0426] Another method shown in 153(a) includes the high frequencycomponents being impressed onto the liquid crystal layer by changing theposition of the dummy pulse 1253 impression at one of multiplehorizontal scanning periods (1H). The signal that is impressed onto theliquid crystal layer is randomized. Therefore, low frame drives becomepossible.

[0427] In the above embodiments, the method was to impress one dummypulse to each horizontal 1253(b), it is obviously possible to impressmultiple dummy pulses (1253 a, b) at each (1H) horizontal scanningperiod. Also, the amplitude value and width of the dummy pulse 1253 canbe changed, as shown in FIG. 64(c). The dummy pulse id not limited toshort wave, but can also be triangular wave or other types as shown inFIG. 64(d). Also, the triangular wave can be placed in a row next toeach other between the horizontal scanning periods as in FIG. 64(e). Asthis FIG. 64(e) shows, power consumption can also be reduced by makingthe triangular wave continuous. Additionally, as is illustrated in FIG.64, changing to the higher frequency of the signal impressed on theliquid crystal layer is also possible by changing the signal 1261.

[0428] The majority of the above-mentioned are related to FRC drives.Below, one type of drive among the MLS drives of the present invention,the PWM drive, will be explained. Also, it should be noted that the FRCdrive procedures could be applied to the PWM drive explained below.

[0429] The following information primarily concerns PWM drives. It is,however, difficult to illustrate the 4 types (8, 4, 2, 1) pulse widthsof PWM (herewith referred to as 15 PWM). To make it easier to understandand to simplify the illustrations, the explanation will focus on thePWM, which uses 3 types of pulse width (herewith referred to as PWM 7).Furthermore, in the 7PWM, 8 graduations can be displayed. Theexplanation will focus on the output waveform (referred to as signalpulse 1261 or signal waveform 1261) of the segment driver.

[0430]FIG. 65 shows the drive waveform impressed onto the segment signalline when engaged in PWM. It is comprised of a 4 pulse width—signalpulse 1261 a, a 2 pulse width—signal 1261 b and a 1 pulse width—signalpulse 1261 c.

[0431] The part which consumes the most power is the one in which thevoltage value alters. For example, point A (voltage changes from V1 toMV2) and point B (voltage changes from MV2 to V1) in FIG. 65. This isdue to the operation of operation amp 451 b and 451 e at point A andoperation amp 451 e and 451 b at point B in FIG. 136.

[0432] At this point, power is required to recharge modulator layerssuch as the liquid crystal layer. Also, the driver output IC14 electriccurrent is generated.

[0433] It is not shown in the present invention, however, an analogswitch has been molded onto the output terminal of the operation amp451. Among the numerous operation amp 451 outputs, this one isconfigured in such a way that only one voltage is impressed onto onesegment signal line. This control is made possible through theconfiguration of other analog switches closing once another, which wasclosed, has opened. Ideally, the period of time that all analog switchesare closed is between 20 nsec to 100 nsec.

[0434] Taking the above into account, the points of change such as pointA and point B indicated in FIG. 65 should be lowered in order to achievelower power consumption. Power consumption lowers as the points ofchange decrease. As one example, the breakdown of power consumption ofthe liquid display panel modulator, 10% is sent to the logic circuit,30% to the analog circuit and 60% to the drives of the liquid crystallayer. Most of the power that drives the liquid crystal layer is thecharge and discharge power in conjunction with the changes in signalwaveform that has been impressed onto the liquid crystal layer. Also, itenables a reduction in driver IC power in organic EL display panels.

[0435] By connecting signal pulses 1261 a and 1261 b, as shown in FIG.66, the points of change in FIG. 65 are reduced. Accordingly, the amountof power consumed at the points of change is halved in comparison toFIG. 65.

[0436] The calculations for these are simple. In MLS calculations, therequired voltage is V1 and V2 (otherwise, number 3 corresponding tovoltage due to the fact that the 5 segment voltages-V2, V1, VC, MV1 andMV2—can be expressed in 3 bits). Additionally, the PWM method has beenimplemented under MLS calculations at each bits/byte. Each bits is setat a period of one pulse. For example, in the case of 16 graduations,the period of the 4th bits is 8 and the 1st bits is 1. In the case of 8graduations, the period of the 3rd bits is 4 and the 1st bits is 1.Furthermore, the above conditions the same for normal PWM drives.

[0437] In other words, the pulse width is weighted at each of therequired bits and voltages should be added. As a result, the period ofthe V2 voltage is L1, V1 is L2, VC is L3, MV1 is L4 and MV2 is L5. Thecalculations (additions) can be output from the segment signal line inresponse.

[0438]FIG. 67 shows the PWM waveform of the dual (2H) horizontalscanning period. There are 5 points of change—a, b, c, d and e. As shownin FIG. 68, the points of change by calculation are a, b and c. Also,FIG. 68 shows the point of connection of the 2H period signal pulse 1261a and the 1H period signal pulse 1261 b. Simply put, the points ofchange are reduced by adding the 2H periods together. This is a simplecalculation. The process of calculation can be implemented through the2H period.

[0439] Furthermore, all or part of the segment driver IC14 function andpart or all of the controller 281 function can be molded as one with thedisplay part 107 using a low temperature polysilicon technique. The lowtemperature polysilicon process is conducted at a temperature of under600 degrees and can use large glass boards similar to those for SITFTamorphous. At this process temperature, the stable, high through-putcrystallized technology can be established. The moving degree of theTFT, which uses low temperature polysilicon for the low temperatureprocess, is approximately 300 cm2 V1 ·S−1. Approximately 10 MHz ofoperation in the logic circuit is possible and it adequately covers themicrocomputer clock 4 MHz in cellular phones.

[0440] By using low temperature polysilicon technology, a picturecontroller and driver can be built into the display panel. Multiplepicture signals are input into the panel in which they are controlledand displayed. In comparison to the separate attachment of a circuit,the reduction in power consumption, low cost and the narrow frame shapecan be possible.

[0441] In the 1st frame, odd (1) and even number (2) lines, then in the2nd frame, even (2) and odd (1) number lines can be connected. Thisprocess wipes out the slowness in the liquid crystal start up and shutdown because the transmission rate variations are decreased by the pulsewidth. Additionally, the even and odd lines in the 2nd frame and the oddand even number lines in the 4th frame can be connected.

[0442] Ideally, the above embodiments should be applied to otherembodiments. For example, applying them to connection methods of thedummy pulse 1701 and the calculation pulse:1321.

[0443] In FIG. 68, the 1st IH period signal pulse 1261 b and the 2nd 2Hperiod signal pulse were connected. However, there are other methods,such as is shown in FIG. 69. In FIG. 69, there are also three points ofchange—a, b, and

[0444] c. The point of change C is from MV2 to Mv1 (change k). It is ½in contrast to the change from V1 to MV1 at point C of FIG. 68.Accordingly, power consumption is more possible in FIG. 69 due to thesmall change in voltage.

[0445] As shown above, a number of calculation results occur even withinthe same PWM waveform by reducing the size of the changes. The mostappropriate calculation can be achieved by calculating while taking theamount of change into consideration.

[0446]FIG. 70 is concerned with 15PWM. There are 3 points of change—a, band c. By conducting the process as shown in FIG. 71, the point ofchange becomes a. As a result, the power used at the point of change is⅓.

[0447]FIG. 72 is an example of the impression of one dummy pulse 1253onto 7PWM. Accordingly, a 1H clock becomes 8 clocks with 2 multipliers.This makes circuit configuration simple. Similarly, if the one-pulsedummy pulse method is used in 15PWM, it then becomes 16 clocks with 2multipliers. In other words, in the PWM method, when adding a dummypulse, making sure there are 2 multipliers for the 1H clock can producethe benefits of simple circuit configuration.

[0448] Furthermore, the above does not apply only to the PWM method, butalso, for example, the FRC method in FIG. 73 (the signal pulse 1261width becomes 7 clocks and the dummy pulse 1253 becomes 1 clock). Thesignal is created so that 1H-scanning period becomes 8 clocks. As aresult, the circuit configuration is simplified. By configuring in sucha way that there are 2 multipliers for the signal pulse period and dummypulse period (so that 1H clock has 2 multipliers). The benefit of easycircuit configuration is produced.

[0449] In FIG. 72, there are 7 points of change in 1H—a, b, c, d, e, f,g—and as shown in FIG. 74, the points of change are reduced to 4 (a, b,c, d) by implementing the calculation process. As a result, a largereduction in power consumption can be achieved.

[0450]FIG. 75 is characterized be the connection of the 1st H perioddummy pulse 1253 a and the 2nd H dummy pulse 1253 b. In other words thedummy pulse is placed at the end of 1H in the odd number horizontalscanning period and the beginning of the even number horizontal scanningperiod. By changing the dummy pulse positions in this way, the number ofpoints of change can be reduced.

[0451] The above does not apply only to the PWM method, but also, forexample, the embodiment of impressing a dummy pulse using the FRCmethod. The dummy pulse 1253 is for 1 clock. By connecting the dummypulse as in FIG. 76, the number of change points decrease and areduction in power consumption is achieved. There is no need forcalculations in FIG. 76. Simply put, the dummy pulse is placed at theend of 1H in the odd number horizontal scanning period and the beginningof the even number horizontal scanning period. In this way, changing thedummy pulse at odd and even horizontal scanning periods using the FRCmethod can reduce the number of points of change.

[0452]FIG. 77 is the embodiment by impressing 1 dummy pulse using thePWM method. At 1H, there are four (a, b, c and d) points of change arereduced to 4 (a, b, c, d) by implementing the calculation process. As aresult, a large reduction in power consumption can be achieved.

[0453] Additionally, the straight polarity V1 & V2 voltages areconcentrated in the first half of the 1H and the negative polarity MV1and MV2 voltages are concentrated in the latter half. By doing so, areduction in the number of points of change can be achieved.

[0454] Also, in the odd numbered horizontal scanning period, thestraight polarity V1 & V2 voltages are concentrated in the latter halfof the 1H and the negative polarity MV1 and MV2 voltages areconcentrated in the first half. By implementing this process, areduction in the number of points of change in signal waveforms can beachieved, making it an ideal process.

[0455] LCD panels, including STN LCD panels, differ in the red (R),green (G) and blue (B) electric optical characteristics (gammaproperties). In particular, in the STN LCD pixel, if the film phasecompensation is not perfectly in sync in RGB, due to the fact that ovalpolarized light becomes linear polarized through the film compensationsthe gamma properties curve being uneven. Furthermore, the gamma curvediffers in RGB due to the fact that their light emitting materials andlaminating configurations are different.

[0456] The synchronization of this gamma properties curve is indeedextremely difficult. In the present invention, a compensating pulse 1541is impressed onto the segment signal, as shown in 178. The compensatingpulse 1541 changes the effective value impressed onto the segmentsignal. Accordingly, the electric optical characteristics (gammaproperties) can be adjusted at R, G or B through the compensation pulse.

[0457] The compensation pulse is applied to at least one of the R, G orB signals. By doing so, the impressed signal gamma properties arechanged. The amount of compensation changes by adjusting the pulse widthand the time of impression of the compensation pulse 1541. As a result,the synchronization of the RGB gamma properties can be done well byadjusting the amount of compensation.

[0458] Also, a reduction in power consumption can be achieved byconnecting the compensation pulse 1541 and signal pulse 1261 asillustrated in FIG. 66.

[0459] The explanation given above is for the MLS drives PWM method, butit is not limited to this method. The explanation can also be applied tonormal PWM drives. Also, neither is it limited to simple matrix-typedisplay panels, but can also be applied to active matrix-type displaypanel, for example, because the fundamental technology concepts areshared regarding the reduction of power consumption through theconnection of signal pulse 1261. Furthermore, this explanation is notlimited to LCD panels, but can also be applied as a drive method fororganic EL (OLED) display panels.

[0460] The above embodiments are what control the segment signal side(please refer to FIGS. 80(a 1) and (a 2)). However, as shown in FIGS.80(b 1) and (b 2), two short waved common signals (1252) can be used(indicated by a and b, please refer to FIG. 26). Simply put, a dummypulse can be impressed onto the segment signal side 1252 or 1253, orboth.

[0461] Additionally, the dummy pulse 1253 changes the effective valuevoltage applied to the liquid crystal layer. As a result, changing thewidth L of the dummy pulse 1253 can alter the level of brightness, asshown in FIG. 81. The larger L is, the larger the effective valuevoltage attached to the liquid crystal layer becomes. Conversely, thesmaller the L, the smaller the liquid crystal layer becomes. Adjustmentis possible by the user through the pressing of the information displayunit button 256.

[0462] The common voltage (V3, MV3) amplitude can be reduced byimpressing a dummy pulse 1253. However, it also means that the dummypulse lowers the bias ratio and therefore the ON/OFF ratio as well. TheON/OFF ratio can be thought of as the contrast. The larger the value,the clearer the difference in black & white can be displayed, enhancingthe contrast.

[0463] The more common signal lines (scanning lines) there are in thesimple matrix-type LCD panel, the word the ON/OFF ratio becomes. Forexample, because the scanning line splits in the center of a 480 VGApanel (2 parts), n=240 lines. In the VGA panel, the ON/OFF ratio is1.06458. Similarly, when the scanning lines are 600 (n=300), the ON/OFFratio is 1.0556, and when the scanning lines are 768 (n=384), the ON/OFFratio is 1.04654 in the XGA panel. These values are not reliant onliquid crystal materials and only relate to the number of scanninglines—n.

[0464]FIG. 82 shows the dummy pulse ratio listed in the horizontal axis.The dummy pulse ratio refers to the dummy pulse width (ratio) covers inthe one-horizontal scanning period (1H). Furthermore, the ON/OFF ratiois listed in the vertical axis in FIG. 82.

[0465]FIG. 83 also shows the dummy pulse ratio listed in the horizontalaxis. The vertical axis lists the change ratio. The change ratio refersto how much of a reduction in V3 (MV3) voltage has occurs through theimpression of a dummy pulse (in the case of signal pulses 1261 coveringall periods of the one horizontal scanning period (1H)) making the V3(MV3) voltage value 1.

[0466] In the simple matrix-type LCD panel, the display that can betolerated is most likely XGA as a picture display. The reason being thatit has been or is being commercialized. In the XGA mode, the ON/OFFratio is 1.0465 Looking at this value in FIG. 110 as a horizontalscanning line sequel (1H=22%), it cannot be said that the curved linesand crossing dummy result of 0.22, or a reduction benefit of 1 to 2% byimpressing the technology onto a M3 have been of any technologicalbenefit to the situation, which needs to be 5%. Looking from the 5%(0.95) reduction position point on the vertical axis to the horizontalaxis, the crossing point with curved lines is a the dummy pulse ratio of0.060 (6% of 1H).

[0467] From the above information, it is noted that the ideal range isno under 0.22 and above 0.06 (indicated by the shaded area in FIG. 83).The change ratio of this range is between 0.83 and 0.95, which is morethan adequate to achieve low voltage. Furthermore, the ON/OFF ratio XGAis adequate in a practical sense at above 1.0465.

[0468] The explanation given above is for simple matrix-type displaypanels but is not limited to them as such. It can also be applied toactive matrix-type display panel. Through the dummy pulse 1253, whichhas many signals that have a lot of high frequency components in it,being impressed onto the liquid crystal layer, flickering can besuppressed and the level of brightness adjusted.

[0469] In FIG. 1, common driver IC15 a and 15 b have been attached (ormolded) to both ends of the segment driver IC14, but not limited tothis. For example, a common driver IC15 can be placed at one endadjoining the segment driver IC14. Furthermore, in FIG. 50, the thicksolid line areas where the common signal 205 has been juxtaposed andmolded. As a result, the C part (bottom of screen) the correspondingnumber of scanning signal lines 205 have been molded and juxtaposed, andat point D, one line has been molded and juxtaposed. Furthermore, asshown in FIG. 1, when two common drivers—15 a and 15 b—are used, thenumber of scanning lines of the common signal 205 a becomes ½ (becausehalf each of the common signal lines can be placed at the right and leftof the screen). As a result, the frame can be spread evenly across thescreen.

[0470] The present invention is also characterized by the screen splitand direction of the scanning of the common signal line 205. Forexample, as shown in FIG. 51, the common driver 15 a is connected withthe common signal line 205 b at the top part of the screen. Also, thecommon driver 15 b is connected with the common signal line 205 a at thebottom part of the screen. As the indicated by the arrow A, the scanningdirection of common signal line 205 also goes from the top to the bottompart of the screen. Furthermore, the segment signal line 206 goes in thesame direction.

[0471] In FIG. 52, the common driver 15 a is connected differently withthe common signal line 205 at the top of the screen. The common driver15 a is connected with the odd numbered common signal line and thecommon driver 15 b is connected with the even numbered common signalline. The direction of the common signal lines are seen as the commonsignal line 205 b going from the top of the screen to the bottom (arrowA) and the common signal line 205 a going from the bottom to the top(arrow B). By connecting the common signal lines 205 to the commondriver IC15 in this way as well as setting the direction of the commonsignal line scanning method, it is possible to suppress the occurrenceof flickering and there are no brightness incline occurrences in screen107.

[0472] Additionally, segment signal 206 follows the same direction oftop to bottom. However, it can also be split at the top and bottom ofthe screen. This is also applicable for the following embodiments.

[0473] In FIG. 53, the common driver 15 a is connected with the commonsignal line 205 b at the top of the screen and the common driver 15 b isconnected with the common signal line 205 a at the bottom of the screen.As the indicated by the arrow A, the scanning direction of common signalline 205 b also goes from the top to the bottom part of the screen andas indicated by arrow A, the scanning direction of common signal line205 a, the scanning direction of common signal line 205 a goes thebottom to top part of the screen. Furthermore, the segment signal line206 also goes from the top to bottom of the screen. By connecting thecommon signal lines 205 to the common driver IC15 in this way as well assetting the direction of the common signal line scanning method, it ispossible to suppress the occurrence of flickering and there are nobrightness incline occurrences in screen 107.

[0474] Also, in FIG. 53, the segment driver IC14 and common driver IC15are controlled by one chip (1 chip driver IC14 a). By making it onechip, then only one chip needs to be attached to the display panel 21.Accordingly, mounting cost reductions can be achieved. Also, variousvoltages used within the one chip driver IC can be used simultaneously.The one-chip driver IC14 a is a semiconductor wafer made from siliconand although mounted to the display panel 21, it is not limited to thatmaterial. Other material technology such as high and low temperaturepolysilicon technology can also be used from display panel 21 anddirectly molded onto it. Naturally, the driver IC that drives the toppart of the screen is placed in the top part of the screen and thedriver IC that drives the bottom part of the screen is placed in thebottom part of the screen (in other words, there are two IC chips). Theabove details can also be applied for other invention embodiments.

[0475] As shown in FIG. 53, when the top part of the screen 107 scansfrom top to bottom and the bottom part of the screen 107 scans frombottom to top, as FIG. 54 shows, the common signal 205 in the center(205 a, 205 b) can be shared. By doing so, the positioning of thesegment signal line 206 and the common signal line 205 is made easier.The benefits of the segment signal line 206 being split in the center ofscreen 107 (common signal line 205) are large.

[0476] The drive method used in FIG. 53 as well as the common signalline 205 drive method shown in FIG. 54 must be performed taking into theaccount the following points. Once the common signal line 205 has beenchosen (in other words, when the common signal lines 205 a and 205 b inthe center part of the screen), it is first necessary that the width andpolarity of the signal voltage applied to the common signal lines 205 aand 205 b are synchronized. If they are not synchronized, they willshort and surges of electricity will flow through them. Furthermore, aline running across the center of the picture display of the screen 107.

[0477] In FIGS. 51 and 53, the screen is shown as to split from themiddle, however this is not the only applicable method. For example, inFIG. 55, screen 107 a can be made smaller and screen 107 b larger. Thedisplay screen 107 a is in a partial display zone and is primarily usedfor the display of time and dates. The partial display zone is used inlow power consumption mode. As shown in FIGS. 51 and 53, the displayzone 107 a is displayed using the common signal line 205 b and thedisplay zone 107 b is display using the common signal 205 a isdisplayed.

[0478] Changing the frame rate (the number of times a screen's framechanges screens per unit of time (1 sec) and drive frequency) in displayzones 107 a and 107 b is effective method in terms of low powerconsumption as well as changing the color display and number of colorsin the display zones of 107 a and 107 b.

[0479] The explanation given above is for simple matrix-type displaypanels but is not limited to them as such. It can also be applied toactive matrix-type display panels. The reason being that partial displayand 3-side free configuration, in particular, is applicable to activematrix-type display panels.

[0480] Using the MLS drive (herewith referred to as MLS4) which uses 4simultaneously selected lines, it is advisable to satisfy therelationship listed below with the n of the nH reverse drive when thenumber of scanning lines is made N, M=N/16 (however, M is the integerthat have rounded smaller number points):

[0481] M−1≦n≦M+5

[0482] Also, a more preferable relationship is:

[0483] M+1≦n≦M+3

[0484] By satisfying the relationship as shown above makes it moredifficult for flickering to occur. The effectiveness of a frame rate(number of times a screen is rewritten per second) of fewer than 50 isparticularly large.

[0485] In the MLS4 method, the segment (SEG) driver IC14 outputs 5levels of voltage. For now, these five levels are: V2, V1, VC, MV1 andMV2. Furthermore, the voltage on the SEG side is referred to as SEGVoltage. Increasing the integral multiple of the reference voltage usinga DCDC computer etc creates these voltages.

[0486] It is known that liquid crystals such as STN liquid crystal havetemperature reliant properties. In order to adjust the changes incontrast through these temperature reliant properties, the referencevoltage is created analogically by adding positive temperaturecoefficient thermistor, non-linear elements to the reference voltagecreating circuits and then adjusting the temperature reliant propertychanges at the thermistor. Increasing the integral multiple of thereference voltage using a DCDC computer etc creates these voltages.

[0487] In the present invention, in order to suppress the occurrence offlickering, a number of shifts processes are conducted. Looking at thedrawing below, the following is an explanation of the drive methods etc.Furthermore, for ease of explanation, L=4 (the number of simultaneouslyselected COM signal lines being 4, or in other words, the MLS 4 drive).However, it is not limited to this calculation as L=2 or above 4 is alsoacceptable.

[0488] In the MLS4 method, one frame is made up from 4 fields. Normally,scanning is conducted 4 times from top to bottom (this is also the casefor FIGS. 51 and 53). Using this method, 4 common signal lines areselected simultaneously for scanning. Also, using the Frame RateController, multiple numbers of frames are expressed as one gradation.

[0489] Using the expression of one gradation, the period of the framesis the denominator and the numbers of frames switched on are expressedas elements. For example, if one frame of six frames is ON then it isexpressed as ⅙. Following is an explanation of the shift process withreference to the drawings. Using multiple frames as one gradationdisplay method, there is the Frame Rate Control method that conductsgradation expressions by controlling the column voltage in each frame.First is an explanation of the FRC method.

[0490]FIG. 84(a) is an example of the expression of the 1st gradation of8 gradation. By expression one frame as ON and six frames as OFF displayis possible. However, the problem of flickering arises when using thismethod for multiple gradations. Therefore, the timing of the ON and OFFis delayed in each pixel and by adjusting the number of gradation forthe ON and OFF pixel ratio in terms of space also, is one method ofsuppressing the problem of flickering. The realization of this method isshown in the pattern in FIG. 84(b).

[0491] For example, when using this method to express the M gradationamong N gradation, in the first line, all the M columns are switched ONin order, the next line is switched OFF (N−M) and repeated in thispattern until the final column. In the second line, in order to dispersethe ON/OFF pixels, the data from the 1st line is displayed with only theL value shifted. From there, the data is expressed with the L shiftedeach time. The shift amount L used here is defined as a line shift. Byconducing this method, the dispersal and placement of ON/OFF spatiallybecomes possible.

[0492] Next, time ON/OFF is dispersed. As with the line shift, the datais expressed with the F shifted each time by taking the data column forthe first line of the first frame and line shifting the data of thefirst line of the second frame. The shift amount F at this time isdefined as a frame shift.

[0493] From the third frame onward, the same method of line shiftingexpressing the pattern in which the F is delayed from the first line ofthe previous frame. Each frame's second line is displayed in the sameway by conducing a line shift. In FIG. 84(b), using the line shift L(=1) and frame shift F (=3), the example of the first gradation of the 8gradations is expressed.

[0494] Furthermore, here the explanation is focusing on a configurationof 7 lines X 7 columns, so when applying this configuration to largerscreens, the lines should be lined up together. The ratio of ON pixelsin all frames is even with one gradation of eight being expressed likethat of the 173 pixels—OFF•OFF•ON•OFF•OFF•OFF•OFF.

[0495] When conducting gradation expressions by the FRC method,flickering easy occurs due to the occurrence of gradation of which theON/OFF number ratio becomes smaller when the number of display gradationincreases. By increasing the frame rate, flickering is reduced, howeverthis increases power consumption.

[0496] For example, in 256 color display, to express the gradationrequiring 7 frames, whereas for 4096 color display, 15 frames arerequired. In order to simply make the flicker level the same, the framerate should be increased two-fold. Conversely, for mobile terminals suchas cellular phones, the amount of power source is limited and so thereduction in power consumption is being demanded. Also, the circuitryfor flickering needs to be simple taking into consideration the demandsfor cost reduction, and the narrow frame shape can be possible.

[0497] The Frame Rate Control (FRC) refers to method of using multipleframes to conduct gradation expressions by controlling the columnvoltage in each frame. However, the problem of flickering arises whenusing this method for multiple gradations. Therefore, the timing of theON and OFF is delayed in each pixel and by adjusting the number ofgradation for the ON and OFF pixel ratio in terms of space also, is onemethod of suppressing the problem of flickering.

[0498] The realization of this method is shown in the pattern in FIG.85. For example, in FIG. 85, when using this method to express the Mgradation among N gradation, in the first line, all the M columns areswitched ON in order, the next line is switched OFF (N−M) and repeatedin this pattern until the final column. In the second line, in order todisperse the ON/OFF pixels, the data from the 1st line is displayed withonly the L value shifted. From there, the data is expressed with the Lshifted each time. The shift amount L used here is defined as a lineshift. By conducing this method, the dispersal and placement of ON/OFFspatially becomes possible. In the embodiment of FIG. 85, 4 lines areconducted simultaneously with the same amount being shifted and aone-dot shift being done every four lines.

[0499] Next, time ON/OFF is dispersed. As with the line shift, the datais expressed with the F shifted each time by taking the data column forthe first line of the first frame and line shifting the data of thefirst line of the second frame. The shift amount F at this time isdefined as a frame shift. From the third frame onward, the same methodof line shifting expressing the pattern in which the F is delayed fromthe first line of the previous frame. Each frame's second line isdisplayed in the same way by conducing a line shift.

[0500] In FIG. 86, the function block diagram of the first state of thepresent invention is shown. The present invention is comprised of agradation controller (not illustrated), which conducts shifts thegradation data shift circuit 111 gradation register (not illustrated)used to output FRC date at every field synchronized signal (FD)(referred to herewith as Vertical synchronized signal (VD) genericnaming the field synchronized signal and the vertical synchronizedsignal), vertical synchronized signal (VD) and horizontal synchronizedsignal (HD), and a gradation selected circuit 112 which selects inputpicture signals (DATA) from the gradation register output.

[0501] In the Multi-Line-Selection Method (herewith referred to as MLS),as illustrated in FIG. 86, conducts MLS line and column calculations viathe MLS circuit 115 of the orthogonal function created by the orthogonalfunction ROM 113 and the input signal B.

[0502] The output of the segment signal lines is changed according tothe values as a result of the MLS line and column calculations and theON/OFF display is conducted through the voltage used between commonsignal line 205 and segment signal line 206. The number of columns ofthe orthogonal function H is the numbers of the common signal line 205.When selecting the common signal, the value of 1 or −1 is held and whennot selected the value is 0.

[0503] Accordingly, in the case of N line simultaneously selection, theorthogonal function have 1 or −1 N in one line, therefore, at least N isrequired for MLS calculations of the input signal S line data. For thatreason, the input signal is N lines of simultaneously selected commonsignal lines are input at the same time.

[0504] The input picture signal of the gradation selection circuit 112in FIG. 86 is input simultaneously in the N lines. If all the N linesare the same gradation, then the same gradation register output isselected. The reason all the N lines are input simultaneously is tolower the main clock, thus reducing power consumption. Naturally, thiscan also be conducted under a one dot serial process.

[0505]FIG. 87 shows the state of output of the gradation selectioncircuit 112 through the present invention. In this drawing, the whitecircles are the pixels in an ON state. Diagonals or black circles arethe pixels in an OFF state. Additionally, the side on direction iscalled the column and the vertical direction is called a line. In thefollowing embodiment, an explanation of the shift process is given, sothe ON and OFF pixels of white and black circles can also be switched inorder to consider the issue of being negative or positive logic.

[0506] In FIG. 87, the 4-line simultaneous selection method is used andthe first gradation of 8 is displayed across the entire screen. Becauseit is the 4-line simultaneous selection method, 4 lines of the sameON/OFF pattern are selected and for groups of 4 lines with differinginput times, the pattern is shifted.

[0507] By using this method, the shift amount of every 4 lines (lineshift) and frame are adjusted, which in turn means that if a line shiftof 3 or 5 or a frame shift of 3 or 5 is set, flickering can be removedat a frame frequency of 120 Hz.

[0508] Among the 5 segment output values, if either a V2 or MV2 outputoccurs, the picture quality tends to deteriorate. For example,flickering will easily occur through interference with 50 Hz offluorescent light when pictures are displayed using only MV2, VC or V2.

[0509] Generally, the results of the calculations are 4, 2, 0, −2, −4.The voltage value of 4 is V2(=2×V1), 2 is V1.0 is VC, −2 is MV1 and −4is MV2 that are impressed on the segment signal 206. Accordingly, asshown in the embodiment of FIG. 87. Neither V2 nor MV2 occurs, thusmaking the display of non-deteriorating picture quality possible.Therefore, there is no longer the necessity to add circuits to preventthe occurrence of V2 and MV2 output and it has the characteristic ofbeing able to reduce the size of circuits.

[0510]FIG. 88 shows the picture pattern in FRC of another embodiment ofthe present invention. It differs from FIG. 87 in the fact that it hasat least 2 types of line shift which both enable differing values to begained as line shift A and line shift B. When conducting 4-linesimultaneous selection, under this method, the values shifted at every4th line were able to be set individually.

[0511] If the configuration is that of the above example, by differingthe values at 3 for line shift A and 4 for line shift B, the ON pixelswhich were lined up diagonally in FIG. 87 by the rules, can be eitherrandomized or set to a certain range. The more random they are set thesmaller the flickering becomes even if the frame rates are reduced.

[0512] In the embodiment of FIG. 88 also, the 4-line takes the sameON/OFF data. Accordingly, V2 or MV2 voltage does not occur (when thescreen displays white raster in the halftone)

[0513] Because there are two line shifts, A & B, the circuit scale isincreased slightly in order to allocate the recognition circuit whichdetermines which register or line shift (A or B) that maintains the lineshift value of the two types. However, the frame rate can be reducedfurther that that of FIG. 87. As a result, low power consumption drivesare also possible.

[0514]FIG. 89 shows another embodiment of the present invention. In thisexample also, the 4-line simultaneous selection method is used of whichN=4, and the first gradation of 8 is displayed. In the previousembodiment, shifts were conducted every 4 lines. In FIG. 89, in additionto conducting shifts every 4 lines, the shift amounts are differedbetween odd and even numbers.

[0515] In the 8 gradation display, if the even number line shift is setfrom 1 to 4, the frame shift either 3 or 5, and the line shift at any of1, 2, 5, or 6, flickering will not occur at even a frame frequency of 80Hz.

[0516] Also, when changing to a 4gradation display, the even number lineshift can be set at 2 or 3, the frame shift at 1, and the line shift ateither 1 or 3. The 4gradation display takes 4 gradations of the 8gradation display and there are some gradations that are used together.However, it was found that the most ideal shift amounts differeddepending on the number of gradation. Therefore, the most suitable shiftwas conducted depending on the display gradation numbers by making itpossible to change the value of the RAM used to maintain the shiftamounts depending on the display gradation numbers.

[0517] Furthermore, it was also found that the shift amounts within eachN line grouping and the ideal line shifts differ depending on the framefrequency. For example, when comparing a frame rate of 80 Hz to that of120 Hz, the shift amounts for the ideal line shifts etc., change to 3.Similar to the gradation display numbers, depending on whether the framefrequency number is under 70, between 70-120 Hz, 120-160 Hz, or over 160Hz, it is possible to change the value of the RAM used to maintain theshift amounts through a microcomputer. In other words, the shift amountis changed in the frame frequency range of more than two frames.Furthermore, the shift amount can be changed in stages or continuously.

[0518] It is advisable to differ the amount of frame shift in line withthe response speed of the liquid crystal material. For response speedsof above and below 150 msec it is possible to change the value of theRAM used to maintain the shift amounts through a microcomputer.Furthermore, the response speed refers to the time added to the timetaken to start up and shut down under normal temperatures. Themeasurement method for the response speed is determined within the fieldof liquid crystals.

[0519] In this case, due to the fact that the liquid crystal materialsselected are determined in principal, software to operate themicrocomputer is not necessary the majority of the time. In other words,depending on the liquid crystal materials, the shift amount can even befixed at a set amount. The most important factor is to select the idealshift amount, as there is an ideal amount for liquid crystal materials.

[0520] The area in which software is needed is related to temperaturedependency. Liquid crystal material viscosity decreases as thetemperature rises and thus the response speed increases. In general, itis said to be proportionate with the quadrupling of temperatures thatare changed. To that end, the temperature of the LCD panel is measuredusing a temperature sensor and shift changes are conducted through amicrocomputer depending on the temperature recorded. The shift amountcan be changed in stages or continuously.

[0521] The above-mentioned temperature dependency and frame rate causesthe amount of shift to change. It is also applied in other shift methodsand situations. For example, the shift methods such as field shifts andRGB shifts.

[0522] Furthermore, the MLS4 method, which selects four linessimultaneously, has been used as an example in the explanation, howeverit is not the only method. The MLS8 method, which selects eight linessimultaneously, the MLS7 that calculates one line virtually, the MLS2method, which selects two lines simultaneously and other MLS methods canbe used. They are applied in other embodiments.

[0523] In the case of gradation expression by FRC, gradation expressionsare being conducted by changing the average brightness of pixels innumerous frames. When a LCD unit is used, there is a change in thefrequency of flickering depending on the response speed of the liquidcrystal. In particular, between the response speeds of 50 msec to 120msec, the ON/OFF frames clearly change. For that reason, vertical lineinterference can easily occur due to interference with other gradations.

[0524] Particular interference with other gradations affects all of thepixels in the segment signal line 206 when interference in that lineoccurs. As a result, the deterioration was of picture quality was fargreater than flickering. For that reason, a transfer switch is attachedexternally to the gradation control block 202, as shown in FIG. 86. Itis configured in such a way that it rewrites the RAM value used tomaintain the shift amount using a microcomputer for response speeds of50 to 119 msec, 120 msec to 299 msec and above 300 msec.

[0525] For example, in the case of the line shift, for liquid crystalswith a response speed of 130 to 300 ms, 2 is better than 1, and forliquid crystals with a response speed of between 50 to 120 ms 4 is morepreferable than 3. For liquid crystals with a response speed of 120 to300 ms, 3 or 5 is more preferable. In response to the panel responsespeed, which is displayed, the display of an ideal shift amount withlittle interference or flickering is made possible.

[0526] As other methods to delay ON/OFF, the methods presented in FIGS.90, 91, and 92 can be considered. In FIG. 92, the method by which theodd number line shifts are input and shift the odd number columns islisted by substituting the value of the RAM used to maintain the shiftamounts in odd number columns opposite to the example of FIG. 89. InFIG. 91, the 2-3 line shifts are listed which shift the 2nd and 3rdlines. In FIG. 90, the 3-4 columns are listed which shift the 3rd and4th lines.

[0527] Furthermore, in FIG. 91, even the 1st and 4th columns can beshifted, not the 2nd and 3rd (1-4 line shift). In FIG. 90, the 1st and2nd columns can be shifted (1-2 line shift) to obtain the same effect.Depending on the line shift 3 and the frame shift 4, the effectivemethod for flickering differs and the combination of ON/OFF data fromdiffering adjoined pixels is required.

[0528] All of these methods are those, which display the same gradationover the entire screen within the 4 line data. They have an ON/OFF ratioof 4 to 0, 2 to 2 or 0 to 4. In these types of combinations, the resultsof the MLS calculations are scanned using only V1 and MV1 voltage.Accordingly, displays without the use of V2 and MV2 electric potentialare possible. As a result, low frame rate FRC gradation display can berealized.

[0529] Also, in order to conduct randomized placement a circuit thatextracts numbers in N line groupings is set up. A method by which theshifts amounts of lines that are changed within the N line groupings isavailable. It is made possible by changing the value of the RAM 1 usedto maintain the shift amounts through each N line grouping number.

[0530] For example, as shown in FIG. 93, a method exists by which theeven number line shift amounts are changed every four lines. In theembodiment of FIG. 93, the shift amount in the odd number block is setat 3 and in the even number block at 5. Accordingly, the ON pattern,which is shifted within the N line, does become somewhat scrambled incomparison to FIG. 89 from a linear point. It is also possible for eachblock to take a completely different shift amount. However, in doing so,the number of registers that memorize the amounts of shift increase,meaning the circuit size too increases.

[0531] From a practical point of view, the combination of a reduction inflickering but a overlapping of circuit size means that the mostpreferable shift amount pattern would be from 2 to 4. Also, in FIG. 93,an explanation of the even number line shift was given, however, itshould be noted that the same level of benefit can be achieved with anodd number line shift or a 1-2, 3-4, 1-4, or 2-3 line shift.

[0532] The above embodiment is that of the MLS4 method. As is shown inFIG. 94, the MLS8 method in which the common signal line which selects 8lines simultaneously, was implemented. As this shows, the presentinvention is not limited to the MLS4 method. Furthermore, the FRCprocessing is not limited to simple matrix-type display panels, but alsocan be applied to active matrix type display panels. Accordingly, thepresent invention can be applied to all display panels and the contentsgiven above are the same for the other embodiments of the presentinvention.

[0533] Following is an explanation of the field shift, which occurs whenshifting gradation data to the sub-field in the MLS drive. The fieldshift also relates to the drive method, which makes the occurrence offlickering difficult even in low frame rates through shift processing.Additionally, field shifting is separate for the MLS drive concept. Thereason being that in one frame (in MLS4, 1 frame equals 4 fields) theeffective value voltage that is impressed onto the liquid crystal layerdoes not reach the effective voltage value set as the objective. Inother words, it is not an MLS drive, but for ease of explanation it istreated as one type of MLS in this explanation.

[0534] The field shift is a drive method, which drives the display panelconfigured into one frame, which is made up of L subframes though adrive method that simultaneously selects the multiple numbers (L) ofscanning electrodes. The gradation display method is primarily FRC.However, it can also be realized under a PWM method.

[0535] The gradation register, which memorizes the gradation patternsrepresenting the ON/OFF at each gradation level, the gradation controlcircuit, which conducts shift calculation processing of the gradationpatterns of the gradation register, and the gradation selection circuitsbuilt onto each signal line are equipped. Through the gradation controlcircuit, the gradation patterns of the gradation register are firstsynchronized onto a vertical sync circuit where shift-calculatingprocessing is conducted at each frame, at the same time as beingsynchronized onto a horizontal sync circuit where shift-calculatingprocessing is conducted at each line. On top of this; shift-calculatingprocessing also takes place at each sub-frame and then the gradation isdisplayed.

[0536] In MSL4 the drive is made up of subframes (sub-fields) from 1-4.An explanation of the gradation display within this MLS drive methodwill be follow. As one gradation display method, there is the FRC methodthat conducts gradation display through the control of the ON/OFFfunctions of each frame using multiple frames.

[0537]FIG. 95 is an example of the frame modulator system used for an8-gradation display. In the case of 8 gradations, the ON/OFF functionsof 7 frames is used with the gradations displayed in a total of 8gradation patterns from 0/7 through to 7/7. The white circle field shiftsets the shift amount by making the position of the 1^(st) fieldstandard. In the embodiment of the 1/7 gradation in FIG. 96, the shiftamount of the 2^(nd) field is 2, the 3^(rd) field is 1 and the 4^(th)field is 5. Accordingly, the shift amounts of the field shift in FIG. 96can be expressed as (2, 1, 5).

[0538]FIG. 96 uses the MLS4 method, which has 4 sub-fields. The presentinvention the MLS4 method, which selects four lines simultaneously, hasbeen used as an example in the explanation, however it is not the onlymethod. As shown in FIG. 97, the MLS2 method, which processes 2 fields,can also be applied. Furthermore, the shift amount in the 2nd field is2.

[0539] The intervals between the signal amounts for each field are notunique. In order to prevent interference between other colors orgradations, it is advisable to introduce some ordinality in the shiftamounts, as shown in FIG. 98. The shift amount for the second field is2, for the third field is 4 and for the fourth field, it is 6. Simplyput, the shift amount ratio (interval) for each field is 2. The shiftamounts for the field shift in FIG. 98 can be expressed as (2, 4, 6)regular way at intervals of 2.

[0540] Other ordinality that are effective is suppressing flickeringinclude the method used in FIG. 99. In FIG. 99, the even number fieldamounts were implemented at set amounts in relation to odd numbers.

[0541] In contrast to the odd number fields (first and third), the evennumber (second and fourth) have shift amounts of 4. Naturally, thisrelationship can be reversed. In the embodiment of FIG. 99, the shiftamount can be expressed as 4, 0, 4. The shift amounts are set with thefirst field position as standard for the field shifts. In the 1/7gradation embodiment of FIG. 96, the second shift field amount is 2 forthe fourth field is formed and 5. According, the shift amount for thefield shift in FIG. 96 can be expressed as 2, 1, and 5.

[0542]FIG. 96 uses the MLS4 method, which has 4 sub-fields. The presentinvention the MLS4 method, which selects four lines simultaneously, hasbeen used as an example in the explanation, however it is not the onlymethod. As shown in FIG. 97, the MLS2 method, which processes 2 fields,can also be applied. Furthermore, the shift amount in the 2^(nd) fieldis 2.

[0543] The intervals between the signal amounts for each field are notunique. In order to prevent interference between other colors orgradations, it is advisable to introduce some ordinality in the shiftamounts, as shown in FIG. 98. The shift amount for the second field is2, for the third field is 4 and for the fourth field, it is 6. Simplyput, the shift amount ratio (interval) for each field is 2. The shiftamounts for the field shift in FIG. 98 can be expressed as (2, 4, 6)

[0544] Furthermore, FIG. 98 also implemented the shift amounts in aregular way at intervals of 2. Other ordinality that are effective issuppressing flickering include the method used in FIG. 99. In FIG. 99,the amounts were implemented at set amounts in relation to odd numbers.

[0545] In contrast to the odd number fields (first and third), the evennumber (second and fourth) have shift amounts of 4. Naturally, thisrelationship can be reversed. In the embodiment of FIG. 99, the shiftamount can be expressed as 4, 0, 4. The shift amounts are set with thefirst field position as standard for the field shifts. In the 1/7gradation embodiment of FIG. 96, the second shift field amount is 2 forthe fourth field is formed and 5. According, the shift amount for thefield shift in FIG. 96 can be expressed as 2, 1, and 5.

[0546]FIG. 96 uses the MLS4 method, which has 4 sub-fields. The presentinvention the MLS4 method, which selects four lines simultaneously, hasbeen used as an example in the explanation, however it is not the onlymethod. As shown in FIG. 97, the MLS2 method, which processes 2 fields,can also be applied. Furthermore, the shift amount in the 2^(nd) fieldis 2.

[0547] The intervals between the signal amounts for each field are notunique. In order to prevent interference between other colors orgradations, it is advisable to introduce some ordinality in the shiftamounts, as shown in FIG. 98. The shift amount for the second field is2, for the third field is 4 and for the fourth field, it is 6. Simplyput, the shift amount ratio (interval) for each field is 2. The shiftamounts for the field shift in FIG. 98 can be expressed as (2, 4, 6)

[0548] Furthermore, FIG. 98 also implemented the shift amounts in aregular way at intervals of 2. Other ordinality that are effective issuppressing flickering include the method used in FIG. 99. In FIG. 99,the even number field amounts were implemented at set amounts inrelation to odd numbers.

[0549] In contrast to the odd number fields (first and third), the evennumber (second and fourth) have shift amounts of 4. Naturally, thisrelationship can be reversed. In the embodiment of FIG. 99, the shiftamount can be expressed as 4, 0, 4. The shift amounts are set with thefirst field position as standard for the field shifts. In the 1/7gradation embodiment of FIG. 96, the second shift field amount is 2 forthe fourth field is formed and 5. According, the shift amount for thefield shift in FIG. 96 can be expressed as 2, 1, and 5.

[0550]FIG. 96 uses the MLS4 method, which has 4 sub-fields. The presentinvention the MLS4 method, which selects four lines simultaneously, hasbeen used as an example in the explanation, however it is not the onlymethod. As shown in FIG. 97, the MLS2 method, which processes 2 fields,can also be applied. Furthermore, the shift amount in the 2^(nd) fieldis 2.

[0551] The intervals between the signal amounts for each field are notunique. In order to prevent interference between other colors orgradations, it is advisable to introduce some ordinality in the shiftamounts, as shown in FIG. 98. The shift amount for the second field is2, for the third field is 4 and for the fourth field, it is 6. Simplyput, the shift amount ratio (interval) for each field is 2. The shiftamounts for the field shift in FIG. 98 can be expressed as (2, 4, 6).

[0552] Furthermore, FIG. 98 also implemented the shift amounts in aregular way at intervals of 2. Other ordinality that are effective issuppressing flickering include the method used in FIG. 99. In FIG. 99,the amounts were implemented at set amounts in relation to odd numbers.

[0553] In contrast to the odd number fields (first and third), the evennumber (second and fourth) have shift amounts of 4. Naturally, thisrelationship can be reversed. In the embodiment of FIG. 99, the shiftamount can be expressed as 4, 0, 4. The shift amounts are set with thefirst field position as standard for the field shifts. In the 1/7gradation embodiment of FIG. 96, the second shift field amount is 2 forthe fourth field is formed and 5. According, the shift amount for thefield shift in FIG. 96 can be expressed as 2, 1, and 5.

[0554]FIG. 96 uses the MLS4 method, which has 4 sub-fields. The presentinvention the MLS4 method, which selects four lines simultaneously, hasbeen used as an example in the explanation, however it is not the onlymethod. As shown in FIG. 97, the MLS2 method, which processes 2 fields,can also be applied. Furthermore, the shift amount in the 2^(nd) fieldis 2.

[0555] The intervals between the signal amounts for each field are notunique. In order to prevent interference between other colors orgradations, it is advisable to introduce some ordinality in the shiftamounts, as shown in FIG. 98. The shift amount for the second field is2, for the third field is 4 and for the fourth field, it is 6. Simplyput, the shift amount ratio (interval) for each field is 2. The shiftamounts for the field shift in FIG. 98 can be expressed as (2, 4, 6).

[0556] Furthermore, FIG. 98 also implemented the shift amounts in aregular way at intervals of 2. Other ordinality that are effective issuppressing flickering include the method used in FIG. 99. In FIG. 99,the amounts were implemented at set amounts in relation to odd numbers.

[0557] In contrast to the odd number fields (first and third), the evennumber (second and fourth) have shift amounts of 4. Naturally, thisrelationship can be reversed. In the embodiment of FIG. 99, the shiftamount can be expressed as 4, 0, 4. This refers to the ON frame, whereasblack circles refer to the OFF frame. It is called 7FRC as the gradationdisplay is conducted in a 7-frame pattern.

[0558] However, because 0/7 are all OFF, fundamentally FRC processing isnot required. Also, as 7/7 is all ON, fundamentally FRC processing isnot required. However, to make the explanation easier to understand,they are listed. Accordingly, it is not required when implementing theactual hardware configuration. The above information is the same forother embodiments.

[0559] In order to implement the gradation display through FRC in theMLS drive method, as shown in FIG. 100, gradation display is done usingthe same gradation pattern shown in the first to fourth subframes interms of the frame shift for 1/7 gradation display.

[0560] When conducting gradation display through FRC, if the number ofgradations increases, the ON/OFF number ratio narrows between thegradations, thus making it easier for gradation to occur. One method isto increase the frame rate and reduce the flickering, however this meansan increase in power consumption. For example, in 256-color display, toexpress the gradation requires 7 frames, whereas for 4096-color display,15 frames are required. In order to simply make the flicker level thesame, the frame rate should be increased two-fold.

[0561] Conversely, for mobile terminals such as cellphones, the amountof power source is limited and so the reduction in power consumption isbeing demanded. Also, the circuitry for flickering-needs to be simpletaking into consideration the demands for cost reduction, and narrowframes.

[0562] The shift amounts are set with the first field position asstandard for the field shifts. In the 1/7 gradation embodiment of FIG.96, the second shift field amount is 2 for the fourth field is formedand 5. According, the shift amount for the field shift in FIG. 96 can beexpressed as 2, 1, and 5.

[0563]FIG. 96 uses the MLS4 method, which has 4 sub-fields. The presentinvention the MLS4 method, which selects four lines simultaneously, hasbeen used as an example in the explanation, however it is not the onlymethod. As shown in FIG. 97, the MLS2 method, which processes 2 fields,can also be applied. Furthermore, the shift amount in the 2nd field is2.

[0564] The intervals between the signal amounts for each field are notunique. In order to prevent interference between other colors orgradations, it is advisable to introduce some ordinality in the shiftamounts, as shown in FIG. 98. The shift amount for the second field is2, for the third field is 4 and for the fourth field, it is 6. Simplyput, the shift amount ratio (interval) for each field is 2. The shiftamounts for the field shift in FIG. 98 can be expressed as (2, 4, 6)

[0565] Furthermore, FIG. 98 also implemented the shift amounts in aregular way at intervals of 2. Other ordinality that are effective issuppressing flickering include the method used in FIG. 99. In FIG. 99,the amounts were implemented at set amounts in relation to odd numbers.

[0566] In contrast to the odd number fields (first and third), the evennumber (second and fourth) have shift amounts of 4. Naturally, thisrelationship can be reversed. In the embodiment of FIG. 99, the shiftamount can be expressed as 4, 0, 4.

[0567] For the embodiment covered above, the element for gradationexpression is 1 (i.e. 1/7 in FIG. 99). Obviously, even if the elementwere above 2, as shown in FIG. 101, field shifts can still beimplemented. The field shift in FIG. 101 is 2/7 and can be expressed as(2, 4, 6).

[0568]FIG. 102 refers to the MLS8 method in which 8 lines are selectedsimultaneously. The second field shift is 2, third field shift is 1,fourth field shift is 5, fifth field shift is 0, sixth field shift is 2,seventh field shift is 1, eighth field shift is 5, and ninth field shiftis 0. Accordingly, the shift amounts can be expressed as (2, 1, 5, 0, 2,1, 5, 0).

[0569]FIG. 103(a) is a 1/4-gradation field shift. The shift amount is(1, 2, 3).

[0570]FIG. 103(b) is a 1/12 gradation field shift. The shift amount is(2, 4, 6). As shown above, the field shift can be set at each gradation.However, from the issue of interference with other gradations and slightdifferences in effective values, it is advisable to make the shiftamounts of the gradations displayed all the same. For example, if the1/4-gradation field shift amount in FIG. 103(a) is set at (1, 2, 3),then the 1/12-gradation field shift amount in FIG. 103(b) should also beset at (1, 2, 3).

[0571]FIG. 104 is an embodiment in which the field shifts of eachgradation have been made the same. It is a 16 gradation FRC (15 FRC).All gradation expressions are shown in FIG. 105. Among the gradations inFIG. 105, 1/12 in no. 1, 1/6 in no. 3, and 1/4 in no. 4 are illustrated.

[0572] All shift amounts for FIGS. 104(a), (b) and (c) in terms of thegradation shift pattern are (5, 0, 5). The expression shift 5 may bedifficult to understand because the numeration is 4. Shift amounts arecounted going right. Starting from the far left, the amounts are countedin order going to the far right, then returning to the far left again.To that end, the pattern is shown in FIG. 104(c).

[0573] All shift amounts have been made the same at each gradation. Forexample, if a 1/12 shift of the second field is 5, then all gradationsare set at 5. If the third field is 3, then all gradations are 3.

[0574] In this way, when the number of simultaneously selected scanninglines is L, the shift amount at each subframe is set at the same valuefor each gradation level. This is the case even if, for example, thegradation pattern should change within the subframes, as it was foundthat flickering could be suppressed without the occurrence of displaydefects due to a slight difference in the effective value voltage thatis applied to the liquid crystal.

[0575] In particular, the setting of the shift amount to 5 as shown inFIG. 105 is the most preferable. Again, the contents of FIG. 104(a) areunderstandable, however, it is advisable to set it so that odd numberfield shifts in fields follow the shift position in even number fieldposition. As a result, the ON data position plays a game of chase bysynchronizing the fields in the odd and even number positions.

[0576] For example, in FIG. 104(a) there is ON data in the position of 6columns of the even number field of the first frame. In FIG. 104(b),there is ON data in the position of 6 columns of the odd number field ofthe second frame. Then, in FIG. 104(c), there is ON data in the positionof 5 columns of the even number field of the third frame, which incomparison to b, has shift columns and is found in the third column fromthe left. In FIG. 104(d), there is ON data in the position of 3 columnsfrom the left in the odd number field and in 8 columns in the ONposition of the even number field.

[0577] Evaluation results show that a high quality picture display canbe achieved without interference from other gradations in any of thefollowing shift amounts in the field shift—(5, 0, 5), (5, 5, 5) or (5,5, 0). Also, flickering did not occur even when the frame rate waslowered.

[0578] The gradation display in FIG. 105 contains the common multiplierof 24 for the number of frames which make up the gradation pattern whichrepresents the ON/OFF of each gradation level when using a 16 gradation(4096 colors) LCD panel drive. The shift amount for each frame on eachgradation level is set at 5. Also, the shift amount is either set at 5or 0 for the shift (L−1) at each subframe that have the same value ateach gradation level. When the common multiplier of 24 uses the frames2, 3, 4, 6, 8 to display the 16 gradations, in comparison to when it is15 frame ratio, the frame numbers are low. This makes the suppression offlickering possible at lower frame frequencies, which is a veryimportant point.

[0579] The following is a list of the possible settings for FRCconcerning the shift amounts in each frame: 2FRC: 1(, 3, 5, • • • );3FRC: 1, 2 (, 4, 5, • • • ) 4FRC: 1, 3 (, 5, • • • ) 6FRC: 1, 5; 8FRC 1,3, 5, 7 and 12FRC 1, 5, 7, 11. Therefore, the 1 or 5 become the commonsetting shift amounts in each frame at each gradation level. Gradationflow easily occurs when the shift amount in each frame is 1. If the samevalue is to be set, then the most ideal amount is 5. Also, if the samevalue is set in each subframe for the shift amount on all gradationlevels at 5 or 0, then the amount of interference between gradations in16-gradation (4096) display decreases and flickering can be suppressedeven if the frequency is lowered to below 60 Hz. This point is alsoimportant.

[0580] As has been shown above, when the number of simultaneouslyselected scanning lines is L, the shift amount at each subframe (L−1) isset at the same value for each gradation level. This is the case evenif, for example, the gradation pattern should change within thesubframes, as it was found that flickering could be suppressed withoutthe occurrence of display defects due to a slight difference in theeffective value voltage that is applied to the liquid crystal.

[0581] Furthermore, at each gradation level of RED, GREEN and BLUE,altering the amount of shift for each subframe (L−1) at the same valuein the shift amounts of each line and each frame of the gradationpattern is highly effective in suppressing flickering. For example, inthe RED gradation pattern, the GREEN is shifted 1 and BLUE is shifted 3.By doing this at the same gradation level, flickering is suppressed.

[0582] The above procedures not only apply to the gradation display inFIG. 105, but also are also possible for the gradation display in FIG.152. Naturally, they can also be applied to other gradation displays,for example when using a 16-gradation (4096 color) display in a LCDpanel such as an organic display panel. In this case, the gradationpattern representing the ON/OFF of each gradation level previouslymentioned is configured in 15 frame units (0/15, 1/15 . . . to 15/15).

[0583] The shift amount for each frame on each gradation level is set atsame value of any of the following: 1, 2, 4,7, 8, 11 13, or 14. Also,the shift amount is either set at 5 or 0 for the shift (L−1) at eachsubframe that have the same value at each gradation level. By settingthe shift amount in this way, the amount of interference betweengradations in 16-gradation (4096) display decreases and flickering canbe suppressed even if the frequency is lowered to below 80 Hz.

[0584]FIG. 105 contains the common multiplier of 24 for the case of16-gradation display (4096 color). It is made up of the commonmultiplier of 8 and 12 and other multipliers. Accordingly, one cycle,which expresses all gradations, of 24 is short and for that reason, itis characteristically low in the amount of interference betweengradations even when conducing field shifts.

[0585] Generally, 4096 colors can be implemented in 256 (512 color)display also. This can be done by selecting 8 gradations from among the16 gradations. By selecting 8 gradations for RED and GREEN, and 4gradations for BLUE, the total becomes 256 colors.

[0586] The following gradations from FIG. 105 can be used in 8-gradationselection: no. 0 0/1; no.1 1/12; no.4 1/4; no.5 1/3; no.8 1/2; no.102/3; no.11 3/4; no.14 11/12 and no.15 1/1.

[0587] Choosing from the above, FIG. 107 shows the placement of no. 0 tono. 8 as an 8-gradation display. If this gradation pattern is used, 256colors can be realized.

[0588] The characteristic of this 256-color display method is that thelargest denominator is 12 (the smallest common multiplier is 12).Accordingly, in comparison to the smallest common multiplier of 24 shownin FIG. 105, the above is half (12/24). As a result, by selecting thedenominator of 12 and the multipliers pattern and then implementing the256-color gradation display, the suppression of flickering is possible.

[0589] Using the 24 multipliers frames of 2, 3, 4, 6, 8, 12 anddisplaying a 16 gradation, the number of frames are less in comparisonto the case of 15 frames. Therefore flickering can also be suppressed atlower frame frequency. By using the 12 as the common multiplier anddisplaying an 8 gradation, the suppression of flickering is even morepossible.

[0590] As the FRC expression of 256 colors (512 colors), anotherpossible method is the 7FRC implementation as shown in FIG. 95. In the 7FRC method, the largest denominator is 7. Therefore, the frequency cycleis shorter making the suppression of flickering even more possiblecompared the situation in FIG. 107 in which the denominator is 12.

[0591] An alternative is to form a gradation pattern in FIG. 152 andthat (7FRC) in FIG. 95 within the IC chip and use the gradation patternin FIG. 105 or 14 for 16 gradations and FRC gradation pattern for 8gradations.

[0592] 15 FRC gradation pattern may be formed as 16-gradation display.In this way, generation of flickers will be suppressed to reduce framefrequencies by displaying gradations using the optimum (perhaps thedenominator is the smallest) gradation pattern according to the numberof gradation displays. This eventually achieves low power consumption.Reduction of frame frequency includes both reduction of frame rate andreduction of main frequency used for circuit operation.

[0593] The gradation pattern can be switched by pressing the user button(265 or 266) placed on the mobile telephone or by user's operation ofthe touch panel placed on the display area 107 directly or indirectly(such as speech entry) A microcomputer may automatically decides thenumber of colors of the image entered and switch. These matters are alsoapplicable to other implementation examples.

[0594] Matters concerning gradation expression in FIG. 105, 107 and 152are the method commonly applicable to FRC drive. Hardware configurationconcerning gradation display is also the common item to FRC drive.Therefore, The method is not restricted only to the field shift drive.

[0595] The field shift was supposed to process in the field direction asshown by the arrow in FIG. 100. There is another field shift methoddescribed in FIG. 106. The following is the description of field shiftdescribed in FIG. 106.

[0596]FIG. 106 shows the implementation example of 7FRC. It illustratesthe gradation pattern 1/7. The data is processed as shown by the arrow.7FRC has on/off data (see FIG. 106) of 4 fields×4 frames=28. This datais serially processed. One on and six off's will be expressed at the endof 7 frames in FIG. 106.

[0597] IT may be a bit difficult to understand FIG. 106 compared to FIG.100. Regard it as the serially connected 28 on/off data for easierunderstanding. Think of applying a process by delimiting this seriallyconnected 28 on/off data with the number of fields 4. FIG. 106 showsdelimitations by 4 in dotted line. The scope delimited by the dottedline shows one frame period. Numbers 1,2,3 . . . is described to showframes for convenience.

[0598] Consequently, the field shift in FIG. 106 has the concept offield and does not have the concept of frame (specifically speaking, ithas little bearing on the concept). Namely, ON is impressed once and OFFis impressed 6 times on the pixel when 7FRC has finished processing.

[0599] When four fields in the conventional first frame are all on inthe field shift in FIG. 106, the element (white circle) of on voltageand the element (black circle) of off voltage are aligned in the samedistance. This makes the frame response aligned in the same distance andeasily suppresses generation of flickers. Namely, It is desirable thatwhite circles and black circles should be aligned in the same distanceif possible.

[0600] Regarding the expression of liquid crystal frame response, itgoes without saying that the drive method in FIG. 106 is applicable tothe display panel that displays images in peak brightness such as anorganic EL These matters are also applicable to the followingdescription of the present invention.

[0601]FIG. 108 shows the case of 2/7 in FRC. Three black circles areplaced after one white circle followed by one white circle. Two blackcircles are placed followed by one white circle. This pattern repeats tomake another patterns. As the white circles and black circles arealigned in almost the same distance, it can reduce the liquid crystalframe response.

[0602] As a matter of course, white circles may be placed in the firstand fourth columns. Or, a white circle may be fixed on the first columnand placed alternatively on the fourth and fifth columns.

[0603] Though FIG. 108 describes white circles are placed in the samedistance, this is not a restriction. White circles may be irregularlyplaced as shown in FIGS. 109 and 110. The reason is that irregularplacing may reduce flicker generation by interference caused by othergradation.

[0604] Though implementation examples in FIGS. 106 and 108 describes asif it is MLS drive, this field shift is not MLS drive. Even a concept offield does not exist. The field exists simply as 4 counters. Theimportant thing is the number of frames×frames expressing the gradation.As a matter of course, there is not even a concept of impressing onvoltage on the pixel with one frame or impressing off voltage. Only theconcept of impressing on voltage by the entire frame×frame or impressingoff voltage exists. Description is made as MLS here for the convenienceof easy explanation.

[0605]FIG. 106 shows the case for 8 gradation 7FRC. The field shift tooutput data in horizontal direction in FIG. 106 needs to matchdenominators of the whole gradation data (Otherwise, it is desirable tomatch denominators of all the gradation data), because it helpssuppressing interference. 15 FRC should be chosen for 16 gradations and31 FRC should be chosen for 32 gradations. Namely, FRC should be thenumber of gradations minus 1. On/off data column can be expressed withthe number of gradations.

[0606]FIG. 111 shows the case for MLS2. two fields×7 FRC makes 14 data.It is delimited in two. FIG. 112 shows the case for MLS8 that allowsselecting 8 common electrodes at the same time. It consists of 56 datacolumns deriving from 8 fields×7 FRC. It is delimited in 8. In eithercase, the field shift in FIG. 106 can correspond to all MLS drive.

[0607]FIG. 113 shows the case for 15 FRC. FIG. 113 (a) shows thegradation in 1/15 and FIG. 113(b) shows the gradation in 3/15. FIG. 114shows the gradation in 4/15 and places white circles in the samedistance where possible. Placing in the same distance means that thedifference between the minimum and maximum distance should be within 2or less.

[0608]FIG. 115 shows implementation example of combinations of shiftprocesses. 7 FRC is taken for an example. FIG. 115(a) shows 1/7gradation. FIG. 115(b) shows 2/7 gradation. FIG. 115(c) shows 3/7gradation. FIGS. 115(a 1), (b 1) and (c 1) show the first breakpointprocess (shown by A).

[0609] A breakpoint means 4 fields×7 frames=28 for MLS4. Likewise, FIGS.115(a 2), (b 2) and (c 2) show the next breakpoint process (shown by B).FIGS. 115(a 3), (b 3) and (c 3) show the third breakpoint process (shownby C). FIGS. 115(a 4), (b 4) and (c 4) show the last breakpoint process(shown by D).

[0610] Though breakpoints are expressed as A, B, C, D, this is not arestriction. It can be more than 4 or 2 or 3. Breakpoints will beprocessed in the order as A, B, C, D, A, B. C.

[0611] The characteristic of FIG. 115 is that the on data is shiftedaccording to the breakpoints. It takes the shift positioning methoddescribed in FIG. 104. Therefore, the detail is omitted here as it wasalready explained in FIG. 104.

[0612] On data can be positioned by randomizing by applying the shiftpattern shown in FIG. 104 for every breakpoint in FIG. 115. That helpsreducing interference generation between gradations and frame rates.

[0613] The combination of above all shift processing or more than 1 willbe used for flicker countermeasure processing. The data shift to controlflicker occurrence at low frame rate will be implemented at level datashift processing circuit. The following will explain the details oflevel data processing circuit motion.

[0614]FIG. 116 is the circuit block illustration of indicator of thepresent invention. The present invention has at least 2 of oscillators101 (101 a and 101 b). The oscillator 101 includes the oscillator, whichoperates itself, and the other oscillators, which will output thespecific frequency by adding the crystal or other circuits. This alsoincludes the oscillators, which operate at specific value by outsideresistance R and built-in condenser C, and items, which oscillateoutside condenser CR by the resistance of inside IC outside, or multipleclocks, which are supplied from devices like micro computers. In thiscase, we may not be able to say that this builds up more than 2oscillators. Since this, however, invention means the oscillators, whichcan input more than 2 clocks; this will be included in the presentinvention. The oscillator 101 is not limited to only 2. More than 3 willbe possible.

[0615]FIG. 117 oscillates the multiple frequencies by 1 of outsidecondenser Cl and 2 of outside resistance R1 and R2. It is needless tosay that the resistance can consist by the patterns inside semiconductorchips of driver IC. As FIG. 117 describes, this can realize byconnecting from terminal S1 of semiconductor chip to C1 of condenser andresistance R1 and R2. Hence, it oscillates by specific frequency bychanging C and R.

[0616]FIG. 118 describes the detailed semiconductor circuits; that is 3inverters of 421 and switch SW1 arranged by analog switch. ON/OFFtransfer of switch SW1 changes the output frequency from terminal OSC1to OSC4. This circuit will not require any explanation.

[0617]FIG. 116 transfer circuit 102 is the analog switch. Since thetransfer switch circuit 102 selects the frequency, this includes the SW1of FIG. 118. The transfer circuit 102 selects the one clock againstmultiple input clocks, and outputs.

[0618] It is possible to have mechanical switch such as relay switchesfor switches inside the transfer circuits 102. Other types of manualtransfer switches are also available. When one input clock cancorrespond with multiple frequencies by microcomputer, it is notnecessary to memorize the transfer switch 102. This type of transferswitch 102 should be included to the concept.

[0619] This type of inventive indicator has at least multipleoscillators 101. For example, the oscillator 101 a operates the clockand the oscillator 101 b operates the clock 100 kHz. To simplify theexplanation, the clock 100 kHz realizes the frame rate 100 Hz (whichrewrites the liquid crystal panel 100 times a second), and the clock 160kHz realizes the frame rate 160 kHz (which rewrites the liquid crystalpanel 160 times a second).

[0620] The output of oscillator 101 will be input to the transfercircuit 102. The transfer circuit 102 is the switch, selects eitheroscillator 101 a or 101 b, and transmits to the transfer circuit 103. Itis preferable to differentiate oscillating frequency within the range ofabove 15% and less than 30% for oscillator 101 a and 101 b.

[0621] The diving circuit 103 passes the input clock frequency withoutdividing, or dividing it into two, four, or eight parts. It means, theclock frequencies output from the dividing circuit come from one of theoscillators 101 a or 101 b with or without being divided (see FIG. 119).Therefore, one can choose any one of the eight frequencies.

[0622] The reason why plural number of oscillators 101 are used is todeal with both moving images and static images, and/or 4096 colors, 256colors and 8 colors successfully. Usually, the frame rate is high whenmoving image is displayed, while it is low when static image isdisplayed. In the case of STN liquid crystal display panel, the effectof interference between gradations is greater when many colors, forexample 4096 colors, are displayed. On the other hand, as theinterference in the case of small number of colors, for example 8colors, are displayed, is small, in such a case, low frame rate fits thepurpose.

[0623] When the frame rate is high, by necessity, the electric powerconsumption of the display unit increases. Therefore, it is desirable touse the unit with as low frame rate as possible, partly because it helpssave the power consumption. The standard frame rates (default) arerepresented in the FIG. 120. It is desirable to switch the frame ratesdepending on the case. You should use different frame rates between 256colors and moving images, even though you use the same liquid crystaldisplay unit.

[0624] For example, when you display 8 colors on the 250-msec liquidcrystal panel, you choose 0.30-40 Hz for the frame rate to lower thepower consumption as much as possible. In contrast, when you display amoving image on the same display, you increase the frame rate up to100-140 Hz so that the splicing would not occur. Accordingly, you candisplay both moving and static images on one display panel in goodquality. It should be noted that, as regarding FRC etc. stated above,you should use different shift processing for moving images and staticimages. Moving images have their own optimal shift processing, whilestatic images have their own optimal shift processing.

[0625] In order to vary the frame rates depending on the number ofdisplayed colors and/or moving/static images, divided frequencies fromone frequency is not enough to get excellent image quality. However, asyou see in the FIG. 116, if at least two oscillators (101 a and 101 b)are equipped, the frame rates represented in the FIG. 119 are achievedin combination with the dividing circuit. In other words, the circuitoperates with more clock frequencies, the power consumption becomes low,and the liquid crystal display panel runs at the optimal frame rate.

[0626] With the present invention, the frame rate is set up so as tobecome one thousandth of the clock frequency generated by the oscillator101. Therefore, if the clock frequency is 160 kHz and not divided, theframe rate is 160 kHz. If you use, as represented in the FIG. 119, twoclock frequencies of 160 kHz and 100 kHz (utilizing two generators), youcan switch the frame rates successfully.

[0627] With regard to the way of switching, a changing-over switch suchas a key switch will be separately prepared, and the way to switch theframe rates (users will switch the frame rates by pressing the keyswitch etc.) will be illustrated.

[0628] When the microcomputer inputs image data into the internal memoryof the segment driver IC14, the data for 4096 colors (RGB: 4 bits) and256 colors (RG: 3 bits, B: 2 bits) are differently stored into thememory (Or the microcomputer operates differently). This difference isrecognized and utilized to switch the frame rates. Specifically, whenthe microcomputer stores the image data of 4096 colors into the internalmemory of the segment IC14, it transfers the command that it stores thedata of 4096 colors to the drive IC14. The dividing circuit 103 etc.start to run when this command is transferred, and the dividing circuit103 outputs clock frequency of 100-120 kHz.

[0629] Likewise, the method to store data to memory is switched to256-color mode by the command from a microcomputer for 256 colors. 80k-100 kHz clocks are outputted from the divided frequency circuit 103for 256 colors. Write the animation flag (description) on the packetdata of the image sent to a mobile telephone (assuming that the displaypanel is used for the display panel of the mobile telephone) inanimation image. The microcomputer detects this flag (by decoding),determines it as an animation and converts the output clock from thedivided frequency circuit 103 to 140-160 kHz. 160 kHz oscillationfrequency of the oscillator 101 b is converted to 1/4 frequency by thedivided frequency circuit to output 30-45 kHz clocks for 8-colordisplay. Therefore, the frame rate will be 30-40 kHz in this 30-45 kHzclocks. In this way, power consumption can be lowered on a proportionalbasis by reducing the frequency. For example, 8-color display is enoughon the menu screen normally displayed on the liquid crystal displaypanel of a mobile telephone. Therefore, it is effective to reduce powerby 8-color display. The present invention enables reducing operatingclock on the entire circuit freely by commands and accelerating theframe rate. This helps to layout ultra-low power consumption modules asa whole.

[0630] Controller 104 has the control functions such as decodingfunction of input commands, external I/F function and memory. Memory 105is the built-in memory made within the segment driver and SRAM memoryfor one screen. As an example, one bit data consists of 8 MOStransistors and the data bus is a two-way bus.

[0631] MLS4 drive is required to compute data for 4 pixels forprocessing. The data bus is structured to be able to output data for 4lines at the same time. Semiconductor process uses aluminum three-layerprocess. To simply the data bus, pixel data may be read one line at atime for 4 times in a row to compute MLS. Data will be read for 8 linesat a time for MLS8.

[0632] Data from the memory is sent to the gradation MLS control circuitfor MLS operation. The result of operation is sent to the segment (SEG)driver circuit. Though SEG driver 14 is separately shown here, it iscombined with the gradation MLS control circuit 106, controller 104 andmemory 105 to make a unit. It is separated for easy explanation. Thecontroller 104 and memory 105 may be separated from the segment driver14 to make a separate chip.

[0633]FIG. 121 shows the layout of the built-in RAM 105 within thesegment driver 14. The built-in RAM has the capacity of 8-color display(1 bit per color) and 256-color display (3 bits for RG, 2 bits for B).The driver controller 104 reads image data on this built-in RAM 105 forstill image in 8-color or 256-color display. It can eventually realizeultra-low power consumption. The built-in RAM 105 may be used formulti-color RAM (4 bits for R, G and B) with 4096 colors or more. It mayalso be used for 650 thousand colors (6 bits for G, 5 bits for R and B),260 thousand colors (6 bits for R, G and B) and true colors (8 bits forR, G and B).

[0634] Examples above are described on the specification to explain thedisplay panel or the display device and are not limited to this. Forexample, 281 is the invention of control IC and 14 is the invention ofthe segment driver (source driver) in FIGS. 121 and 122. And 15 is theinvention of the common driver (gate driver). Functions and operationsof these IC's are detailed in FIG. 86, FIG. 116, FIG. 118 and FIG. 119.Therefore, selling these IC's is also an implementation of the presentinvention. These IC's can be built not only on liquid crystal displaypanel but also on organic EL (OLED) display panel and inorganic ELdisplay panel. Furthermore, It can comprise information display devicesuch as a mobile telephone, note PC and TV using the mentioned displaypanel. These items are applicable to other examples for the presentinvention.

[0635] Data after MLS operation (3 bits showing voltage value or thenumber indicating voltage) may be stored for image data on the built-inRAM 105. It could be the data after error diffusion process. Though 204is described as SEG drive buffer, it is not a simple buffer. It is madeup of various functions and circuits to process input from MLS operationcircuit 115 and the built-in RAM and output voltage to the segmentsignal line such as data conversion circuit, latch circuit, commanddecoder, shift circuit, address conversion circuit. This item is truefor other examples of the present invention.

[0636] The controller 281 may have an oscillator such as oscillationcircuit 101. The layout and function of the oscillation circuit 101 isdescribed in FIG. 118 and the detail is omitted here. The externalcapacitor C and resistor R are described as CR1101 in FIG. 121.Oscillation circuit generates the basic oscillation frequency byselecting either CR1102 a or 1102 b. The generated basic oscillationfrequency (clock) is supplied to the internal circuit of the controller281 and the segment driver 14.

[0637] The segment driver IC 14 synchronizes with the controller 281 toprocess data. Therefore, the image controller 1101 of the controller 281can synchronize with the driver controller 104 of the segment driver IC14 to process image data. This enables reducing buffer memory size andeventually the chip size.

[0638] Image data is stored on the image memory 1103. The imagecontroller 1101 reads data from the image memory for error diffusionprocess (including dithering). The processed image data is transferredto the MLS operation circuit of the segment controller.

[0639] The segment driver IC 14 (segment driver circuit) synchronizeswith the controller 281 to process data. If the segment driver canserially process input image data, the image memory 1103 of thecontroller 281 is not necessary, because the data is not temporarilystored. Or line memory for a few lines may be prepared in the segmentdriver IC 14 or the controller 281.

[0640]FIG. 123 shows the layout using the built-in RAM and the externalRAM 1111. Image data is stored only on the built-in RAM (4 bits for RGBeach×number of pixels for 4096 colors), or on both the built-in RAM 105and the external RAM 1111. Specifically, the built-in RAM 105 of thesegment driver 14 in FIG. 123 has RAM capacity for one screen to display4096 colors. The external RAM 1111 has the capacity of 2 bits per pixelRGB (2×3=6 bits). Therefore, combination of the built-in RAM 105 and theexternal RAM 1111 requires 6 bits. Namely, 260 thousand colors can beexpressed in 64 gradations per color. As a matter of course,configuration of 4 bits for each pixel RGB (4×3=12 bits) on the externalRAM 1111 can achieve true color display. In another word, multi-colordisplay is easily achieved by changing the capacity of the external RAM1111.

[0641] Though FIG. 123 shows the external RAM 105 is formed in thesegment driver 14, it may be formed in the common driver 15. You canalso use the RAM formed for each pixel in the display area 107. You mayimplement the external RAM 1111 with COG technology on the board 12 or11 of the display panel 21. It is needless to say that the items aboveare applicable to other examples of the present invention.

[0642] Generally, low power consumption takes precedence over the numberof display colors for information display devices such as mobiletelephones. Power consumption increases due to reasons such as higheroperating frequency of the circuit to increase the number of displaycolors or more changes of voltage wave impressed on the liquid crystal.Therefore, increasing the number of display colors is limited.

[0643] The mobile telephone of the present invention shown in FIG. 124is equipped with a CCD camera on the back of the body 262. Images takenby the CCD camera can be immediately displayed on the display screen 107of the display panel. Data taken by the CCD camera can be displayed onthe display screen 107. Image data taken by the CCD camera can beswitched by the key entry 265 between 24 bits (1.67 million colors), 18bits (260 thousand colors), 16 bits (65 thousand colors), 12 bits (4096colors) and 8 bits (256 colors). Error diffusion process or ditheringshould be applied to the image data before displaying it.

[0644] Error diffusion process should be applied to display dataespecially when the built-in RAM 105 is 12 bits or more. Namely, if theimage data from the CCD camera exceeds the capacity of the built-inmemory, such as an error diffusion process is performed to reduce thenumber of display colors to fit the capacity of the built-in memory 105.Image processing method and configuration of this error diffusionprocess will be later described in FIG. 135 and is omitted here.

[0645] It is preferable to display images such as figures taken by theCCD camera in more number of degradations. It is also preferable todisplay nature images in more number of degradations. On the other hand,it is desirable that menu screens will be displayed in a reduced numberof display colors for low power consumption.

[0646] To address this problem, images are to be displayed only with thebuilt-in RAM 105 in the normal situation. If only the built-in RAM 105is used, low power consumption can be achieved because the process isclosed within the chip 14 (external access is not required). If theimage is to be displayed in more number of degradations than thatsupported by the built-in RAM 105, use the external RAM 1111 together.For instance, when the number of display colors is expressed in 6 bitsper color and the built-in RAM supports 4 bits per color, use the datastored on the external RAM 1111 for the upper two bits.

[0647] Therefore, when the color of the image data is expressed in 6bits per color, store the upper 2 bits on the external RAM 1111 and thelower 4 bits on the built-in RAM 105. When the color of the image datais expressed in 8 bits per color, store the upper 4 bits on the externalRAM 1111 and the lower 4 bits on the built-in RAM 105. Of course, whenthe image data is expressed in 4 bits per color, store the whole bitsonly on the built-in RAM 105. When the image data is expressed in 6 bitsper color, read the data on the external RAM 1111 in sync with thebuilt-in RAM 105 and convert the image data to 6 bit data.

[0648] By the configuration described above, only the built-in RAM 105is used for the normal number of display colors to address low powerconsumption. If the image is to be displayed in more number ofdegradations than that supported by the built-in RAM 105, use theexternal RAM 1111 together to display the image. This enables achievingmulti-gradation display in excellent quality. Increase of the capacityof the external RAM can easily increase the number of gradation displaycolors, which improves general versatility.

[0649] Moreover, to address data on the external RAM 1111, set up anaddress bus on the segment driver 14 to allow addressing. As MLS4operation requires data for 4 lines, it is desirable that 4 lines ofdata on the external RAM 1111 should be structured to be read at thesame time.

[0650] The example in FIG. 123 shows that the upper 4 bits off thebuilt-in RAM 105 are to be stored on the external RAM 1111. This is notrestricted. The lower bits may be stored on the external RAM 1111. Thisdoesn't restrict that the upper and lower bits be separately stored. Forexample, it may be configured to store the menu screen on built-in RAM105 and sub images and user images on the external RAM 1111.

[0651] And the example of the present invention shows that theoscillation circuit 101 is to be built in the controller 281 or thesegment driver 14. This is not restricted. A microcomputer may be usedto generate clocks used to run the segment driver 14.

[0652] Information display devices such as a mobile telephone of thepresent invention are equipped with a certificate route key. This keyallows configuration for SSL (Secure Socket Layer) encryptedcommunication between I-mode sites. A certificate route key is thepublic key for internet terminals to carry out SSL encryptedcommunication with the certificate authority (CA). Installing acertificate route key enables a mobile telephone to carry out SSLencrypted communication with the site for i-mode with SSL encryptedcapability using the certificate authority. It implements e-commercewhich requires security protection such as credit card informationexchange with SSL encrypted capability.

[0653] As a result of various investigations, there is an importantrelation between the response time R (msec) of the liquid crystal andthe frame rate F (Hz) on MLS4 drive in FRC method. The response time R(msec) of the liquid crystal is the sum of build up time and fall timeof the liquid crystal in 20° C. to 25° C. The frame rate F (Unit is Hz.In another word, number of screen rewrites per second=number of screens)is the times F that the whole screen is rewritten per second. Scanninglines on the display panel shall be K lines (K is 2 or more). Apply allor either of FRC processes ever described in the drawing. However, ashift process is not required in 8-color display. As the result ofexperiments and investigations, wee have learned that it is important tosatisfy the following relations between R, F and K.

[0654] It is optimum to satisfy the following relation between R, F andK in 8-color display.

[0655] 150≦(K·R)/F≦2500

[0656] Preferably, it is desired to satisfy the following relation.

[0657] 250≦(K·R)/F≦1500

[0658] It is desired to satisfy the following relation between R, F andK for a still image in 256-color display.

[0659] 80≦(K·R)/F≦800

[0660] Preferably, it is desired to satisfy the following relation

[0661] 100≦(K·R)/F≦600

[0662] It is desired to satisfy the following relation between R, F andK for a still image in 4096-color display.

[0663] 100≦(K·R)/F≦700

[0664] Preferably, it is desired to satisfy the following relation

[0665] 120≦(K·R)/F≦600

[0666] It is desired to satisfy the following relation between R, F andK for an animation display.

[0667] 80≦(K·R)/F≦500

[0668] Preferably, it is desired to satisfy the following relation

[0669] 100≦(K·R)/F≦400

[0670] The display devices (such as a mobile telephone) of the presentinvention are configured to set the value of the above-mentioned formulaby a user switch and automatic switching by a microcomputer. Thisenables achieving the optimum screen display in the optimum frame rateby the number of display colors and display status. If the opticalmodulation layer is liquid crystal, satisfying these ranges helpsachieve good image display in no (less) generation of flickers.

[0671] Outputs of the frequency divider circuit 103 are given to the COMdriver circuit 18, the controller 104, the memory 105 and the gradationMLS control circuit 106. Though FIG. 116 shows that the SEG drivercircuit 14 is separately installed, the controller 104, the memory 105,the gradation MLS control circuit 106 and the SEG driver circuit wereconstructed on a chip to achieve low power consumption. The powercircuit is separately integrated and installed. It may be built in thesegment driver 14. The memory 105 can hold display data for more thanone screens and provide two-way I/I capability (Reading and writing datat the same time). The controller includes the command decoder and thedata swap circuit.

[0672] Therefore, the segment driver is able to know whether the data is256 colors, 4096 colors or 8 colors by the command from a microcomputer.Data can be automatically converted by decoding commands from themicrocomputer and by controlling the switching circuit 102 and thefrequency divider circuit. Therefore, users can view images in theoptimum condition without worrying about the display color.

[0673] Especially when you want to switch frame rates by the displaycolor, you may place a user button on the device such as a mobiletelephone to enable switching display colors.

[0674]FIG. 124 is a plan view of a mobile telephone as an example ofinformation terminal devices. Antenna 261 and ten-key 265 d are attachedon the body 262. 266 denotes the display color switching key. Theinternal circuit block of a mobile telephone is shown in FIG. 125. Thecircuit mainly consists of blocks of an up-converter 275 anddown-converter 274 and a block LO buffer 276 of a duplexer 271, PApre-driver, PA278 and the like.

[0675] Pressing the key 265 changes the display color to 8-color mode,pressing the key again changes to 256-color mode, pressing the key againchanges to 4096-color mode. This is the toggle switch that changes thedisplay mode every time the key is pressed. A change key may beseparately set for the display color. In this case, three or more keys261 are required.

[0676] The key 265 can be other mechanical switches such as push switchand slide switch and can be the one switched by speech recognition. Forexample, configure switches so that the display colors on the displayscreen 107 of the display panel can change by speech entry of 4096colors into the receiver 264 and high-resolution display. This is easilyachieved by adopting the current speech recognition technology. Forexample, a user speaks “256-color mode” or “low display color mode” tothe receiver. Then the receiving terminal starts analyzing the speechand switches to the directed display mode.

[0677] The switch can be the one that electrically switches the displaycolors such as a touch panel which selects an option by touching themenu displayed on the display 107 of the display panel 21. The switchcan be configured to switch by the rotation or direction such as a clickball.

[0678] Though 266 is shown as the display color switching key, it may bea frame rate switching key. It may also be a key to switch betweenanimation and still image. It may also switch multiple requirements atthe same time such as animation, still image and frame rate. It may alsobe configured to gradually (continually) change the frame rate bykeeping on pressing the switch. In this case, it can be achieved bychanging the resistor R to the variable resistor and electronic volumeout of the capacitor C and the resistor R comprising an oscillator. Itcan be also achieved by changing the capacitor to a trimmer capacitor.It may also be achieved by forming multiple capacitors on thesemiconductor chip, selecting one or more capacitors and connecting themin parallel circuit.

[0679] Reference voltage or bias ratio may also be automaticallyswitched by the microcomputer control or a specific menu display may becontrolled for display. It may also be switched using a mouse or may beconfigured to allow switching by pressing a specific place on the menudisplayed on the touch panel on the display screen of the display device21.

[0680]FIG. 126 shows the configuration of the portable informationterminal (such as a mobile telephone) of the present invention where thedisplay panel 21 is used as a monitor. The body 262 consists of the 262a with the display panel 21 and 262 b with the ten-key 265 in FIG. 126.

[0681]FIG. 127 is a cross section of FIG. 126. An opening is made in thebody 262 a to store the body 262 b. The display panel 21 is attached tothe body 262 a and the front light 1861 is placed as an illumination inthe front, and a back light 1866 is provided inside the body 262 a. Atouch panel 1867 is attached over the surface of the front light 1861.

[0682] 0.1 μm or more and 0.8 μm or less air gap shall be providedbetween the front light 1861 and the display panel 21. Preferably, it isdesirable to have 0.2 μm or more and 0.5 μm or less air gap. However,this is not a restriction and an optical coupled layer 1824 may beplaced or injected into the mentioned air gap.

[0683] In this case, it would be more appropriate to attach the frontlight 1861 on the display panel than to provide a gap. It is desirableto form AIR coat on the surface of the front light 1861 whose thicknessshould be 0.4 μm or more and 1.0 μm or less.

[0684] Convex alignment section 1865 a is formed on the body 262 a andconcave alignment section 1865 b is formed on the body 262 b. Theposition is designed to get fixed when the body 262 b is inserted intothe body 262 a by fitting this convex alignment section 1865 a over theconcave alignment section 1865 b.

[0685] The convex section 1863 and the spring 1864 as an elastic bodyare formed on the body 262 a and the concave section 1862 is formed onthe body 262 b. When the body 262 b is withdrawn from the body 262 a,this concave section 1862 fits over the convex section 1863 to fix theportable information terminal to the appropriate position.

[0686] The spring 1864 and some other parts are used to fix the body 262b and to facilitate the body 262 a and 262 b insertion. This does notrestrict to the spring 1864 and it can be everything that functions asan elastic body such as sponge. The form and structure are notrestricted, either. For example, it could be configured that the convexsection 1863 moves up-and-down.

[0687] As has been mentioned, the terminal can be made compact when itis not used by having the body 262 b inserted into the body 262 a. Theportable information terminal can be big enough when it is used.

[0688] As shown in FIG. 128, it is effective on compact design to dividethe terminal into three parts. The body 262 a and the body 262 c areattached on the body 262 b and three bodies 262 can be used on a planeby pivoting them on pivots 1871 a and 1871 b. In this construction, thebody 262 a includes a display portion 1872.

[0689] The present invention shall be equipped with two or moreoscillation circuits 101 and divided frequency circuit to divide theoutput of the mentioned oscillation circuit. It is separately equippedwith the oscillation frequency regulation circuit. This oscillationfrequency regulation circuit regulates the oscillation frequency in aspecified range. Generally, the oscillation circuit oscillates with theresistor in the semiconductor chip and the external capacitor 1102.However, the resistance generated by the semiconductor in the chipexhibits a wide range of variation. It normally varies ±20%.

[0690] The oscillation frequency regulation circuit branches from thedefined position in the built-in resistor by the tap and controlsoscillation frequency by changing the length of the resistor. Therefore,the oscillation frequency regulation circuit does not convert theoscillation frequency to multiple frequencies (like the oscillationcircuit 101); It regulates the oscillation frequency caused by theproduct variation of the semiconductor to achieve the predeterminedvalue. The oscillation frequency regulation circuit of the presentinvention is configured to regulate the oscillation frequency indecrements of 5% from +20% to −20%.

[0691] The technical idea of switching the frame rate by the displaycolors is not restricted to a mobile telephone and is widely applicableto devices with display screen such as palm-top computer, note PC,desk-top PC and portable watch. It is not restricted to liquid crystaldisplay devices (liquid crystal display panel) and is applicable toorganic EL panel, TFT panel, PLZT panel and CRT.

[0692] Improvement of opening ratio will be an important developmentsubject for full color organic EL display panel and active matrix typedisplay panel. Improving opening ratio increases utilization efficiencyof light and leads to higher intensity and longer life. To improveopening ratio, you have to decrease the TFT area that blocks light fromthe light modulation layer such as organic EL layer. As low temperaturepolycrystal Si-TFT has 10 to 100 times performance compared to amorphoussilicon and higher current supply ability, it can make the TFT sizesmaller. Therefore, it is desirable to manufacture pixel transistor andperipheral driving circuits with low temperature poly-silicon technologyfor organic EL panel.

[0693] The resistance especially significant on the current-drivenorganic EL panel can be reduced by forming a driving circuit on theglass substrate. It eliminates the TCP connection resistance andshortens the lead wire from the electrode by 2 to 3 mm compared to TCPconnection to minimize wiring resistance. Furthermore, it eliminate theprocess for TCP connection. It is also advantageous in lowering thematerial cost. These items are also applicable to the liquid crystaldisplay panel.

[0694] Needless to say that all items and descriptions in thisspecification are applicable to driving methods, circuit layouts,devices and transmission formats of the present invention on the organicEL panel.

[0695] Should information such as frame rate be described in thetransmission format, the frame rate will be automatically changed bydecoding or detecting this described data. Especially, it is desirableto describe whether the transferred image is an animation or a stillimage. It is desirable to describe the number of frames per second foran animation. It is desirable to describe the model number of a mobiletelephone on the transmission packet. The transmission packet explainedin this specification does not need to be a packet. Namely, it can beanything so long as the sending data contains information described inFIGS. 131 and 139.

[0696]FIG. 129 shows the transmission format sent to a mobile telephone.Transmission means both sending and receiving data. In another word, amobile telephone may send the speech from the receiver or the imagetaken by the CCD camera attached to the phone to other mobile telephone.Therefore, items relating to the transmission format described in FIGS.131 and 139 are applicable to both sending and receiving.

[0697] Should information such as frame rate be described in thetransmission format, the frame rate will be automatically changed bydecoding or detecting this described data. Especially, it is desirableto describe whether the transferred image is an animation or a stillimage. It is desirable to describe the number of frames per second foran animation. It is desirable to describe the model number of a mobiletelephone on the transmission packet. The transmission packet explainedin this specification does not need to be a packet. Namely, it can beanything so long as the sending data contains information (such asnumber of display colors and frame rate) described in FIG. 131.

[0698] Data is digitized and transmitted in a packet format for themobile telephone of the present invention. As described in FIGS. 129 and130, a frame consists of flag part (F), address part (A), control part(C), information part (I), frame check sequence (FCS) and flag part (F).The format of the control part (C) takes three formats such asinformation transmission (I frame), supervisory (S frame) and unnumberedsystem (U frame).

[0699] First, information transmission format is the control fieldformat used for information (data) transmission and is the only formathaving data fields except a part of unnumbered system format.

[0700] Supervisory format is the format used for supervision and controlfunctions, namely confirmation of receiving information frame and resendrequest of information frame. The frame in this format is called asupervisory frame.

[0701] Unnumbered system format is the format of the control field usedto carry out other data link control functions. The frame in this formatcalled an unnumbered system frame (U frame).

[0702] Terminals and a network control transmission information framesby their sequence number (S) and the receiving sequence number (R).N8(S) and N(R) consist of 3 bits. Eight bits from 0 to 7 are used forrepeating number and 0 appears next to 7 to make a modulusconfiguration. Therefore, the modulus in this case is 8 and the numberof frames that can be continuously transmitted without receivingresponse frames is 7.

[0703] Data area includes 8 bit data showing the number of colors and 8bit data showing frame rate. The example of this is shown in FIGS.131(a) and (b). It is desirable that identification of still image andanimation is included in the number of display colors. It is desirablethat a model name of a mobile telephone, description of the image datato be transmitted (natural image of figures, menu screen) in the packetshown in FIG. 129.

[0704] The model receives the data, decodes it and automaticallyconverts to the display color and the frame rate according to thedescription if the data is sent to itself (its model number). It mayalso be configured to display the description in the display area 21 ofthe display device. Users view the description (display color,recommended frame rate) on the screen 21 and manually change to theoptimum display condition through key operation.

[0705] The example in FIG. 131(b) shows that the value 3 indicate theframe rate 80 Hz. This is not restricted to it and may be anythingshowing a certain range such as 40-60 Hz. The data area may include amodel of the mobile telephone as the frame rate may need to be changeddue to different performance of models. It is also desirable to includeinformation on images to identify its characteristics such as cartoonand advertisement. The packet should include information on the rate ofviewing. The packet length may be also included. Users decide whether ornot to receive information by checking the rate of viewing. It isdesirable that the packet includes data to identify whether the errordiffusion process has been applied to the image data.

[0706] It is better to include information such as image processingmethod (error diffusion process, type of dithering, type of weightingfunction and its data, gamma coefficient) and model number. And includeinformation to identify whether the image data is taken by CCD camera,JPEG data, MPEG data, BIT MAP data and its resolution. This includeddata will be automatically received, detected and changed to the optimumcondition by a mobile telephone.

[0707] Of course, it is desirable to include information to identifywhether the transmission data is an animation or a still image. It isdesirable that the animation includes the number of frames per second.It is also desirable to include information on the number of playbackframes per second recommended by the receiving terminal.

[0708] These items are true to the sending transmission packet. Thetransmission packet described in this specification does not need to bea packet. It can be anything so long as the sending data containsinformation described in FIG. 131.

[0709] The frame rate is pertinent to the power consumption of the panelmodule. Namely, increasing the frame rate increases the powerconsumption almost on a proportional basis. It is necessary to reducethe power consumption of a mobile telephone from the viewpoint of givingit a longer waiting time. On the other hand, it is necessary to increasethe denominator (number of bits of the gradation register) of FRC toincrease the number of display colors (increase the number ofgradations). However, it is difficult to increase the power consumption.

[0710] To resolve this problem, the present invention adopts aconfiguration to increase the number of apparent gradations by applyingthe error diffusion process. The error diffusion process is thetechnology to increase the number of gradations by the technology suchas area gradation.

[0711] For example, a panel with 16 gradations can express 4096 colors(16×16×16). RGB is expressed in four bits respectively (total 12 bits).Therefore, to display 65 thousand colors, apply the error diffusionprocess to the input data (R, B: 5 bits, G: 6 bits, total 16 bits),convert it to 4 bits corresponding to RGB and impress it on the liquidcrystal display panel. To display full color (RGB: 8 bits each), RGBdata is converted to 4 bits to be displayed on the liquid crystaldisplay panel. Output is not restricted to 4096 colors and can be 65thousand colors.

[0712] One of the dithering methods is shown in FIG. 132. As FIG. 132shows, the original image is divided into a harsh mesh by 4 verticaldots×4 horizontal dots and each divided block is converted to binaryform. Each block corresponds to the square area consisting of 4×4 pixelgroup. The brightness of each pixel group in this rectangular area iscompared to the corresponding item in the predefined 4×4 “dithermatrix”, i.e., “dithering array” table as shown in FIG. 133. If thevalue in the corresponding part in the table is smaller than thebrightness, it is replaced by white (brightness 255). Otherwise it isreplaced by black (brightness 0). This is the case of binary and may beapplied to multiple value. Dither matrix includes Bayer type, half-tonetype, screw type, middle-tone enhancement type and dot concentrate type.Though any one of these works, middle-tone enhancement type is optimumfor the liquid crystal display panel or the organic EL display panel.

[0713] An error diffusion process or dithering method may vary for eachfield or frame. For example, Bayer type may used for the first frame andhalf-tone type may be used for the second frame in dithering. Varyingand switching dithering for each frame delivers effect of making dotirregularity less prominent.

[0714] Coefficient of error diffusion may vary for the first frame andthe second frame. Or, the combination of these may be applied, namelythe error diffusion process for the first frame, dithering for thesecond frame and the error diffusion process again for the third frame.Or random processing method may be selected to process each frame byrandom number value with the random generation circuit.

[0715] In dithering, Bayer type may be used in normally black (NB) modeand half-tone type may be used in normally white (NW) mode. Namely,processing method varies for every mode. Likewise, dithering may beapplied in NB mode and the error diffusion process may be applied in NWmode. Coefficient of the error diffusion process may vary for the firstframe and the second frame in NW mode and the same process may beapplied to all the frames in NB mode.

[0716] In the present invention, the SEG driver 14 has the image memory(built-in memory) for one screen. Therefore, if the display image is astill image, external data input is not necessary and the built-inmemory 105 may only be accessed. External data input requires drivingpower to drive the external wiring while built-in memory requires lesswiring inside the chip, which is almost negligible. Therefore, powerconsumption may be reduced in the configuration with the built-inmemory.

[0717] The configuration with the built-in memory for one screen isapplicable not only to the SEG driver 14 but also to the source driverof the TFT liquid crystal display panel. Namely, the present inventionis applicable to the active matrix liquid crystal display panel. It isalso applicable to other device or display panels such as EL displaypanel. It is configured to transfer a command to the COM driver from thecontroller of the SEG driver 14 to control the COM driver 15.

[0718] Furthermore, the display device (or display panel) 21 of thepresent invention is equipped with the error diffusion processcontroller 971 in addition to the SEG driver 14. To simplifyexplanation, explanation is given assuming that the SEG driver 14 hasthe built-in memory 105 for one screen for 4096 color display and thememory whose size is {fraction (1/15)} to ½ of the screen for 65thousand color display and operation (R. B: 5 bits, G; 6 bits).

[0719] Needless to say that the error diffusion process controller 281with full-color capability (RGB: 8 bits each) can achieve full-colordisplay through the error diffusion process.

[0720] The error diffusion process means the general process method tosimulate higher resolution display in less gradation display in theentire screen by adopting the concept of area gradation. This technologyis established as the technology to print images on a printer. Noveltyof the present invention is that a chip or a circuit for the errordiffusion process is prepared separately from the chip or circuit havingthe memory for still image data. Another point is that the datacalculated by the error diffusion process in the error diffusion processcontroller is transferred to the mentioned still image memory 105 to bestored.

[0721] Error diffusion means the general process method to simulatehigher resolution display in less gradation display by adopting theconcept of area gradation considering the gradation and color on theperiphery of the pixel. The error diffusion technology is installed onthe display devices such as CRT and used for image processing for colorprinters. Needless to say, dithering is also included in the concept oferror diffusion process. A combination of error diffusion and ditheringmay be used.

[0722] This specification refers to error diffusion as the method toachieve multiple gradation display in less gradation by diffusing theinput image data to the peripheral pixels. Namely, the error diffusionin this specification includes wider meaning than the generally callederror diffusion process.

[0723] As is shown in FIG. 134, the segment (SEG) driver 14 (applicableto the source driver for the active matrix type display panel such asTFT) is equipped with two I/F systems. One is for 12 bit input andanother is for 16 bit input (24 bits are required for full color. It isnot restricted to two systems and may be three systems such as 12 bits,16 bits and 24 bits.) Therefore, image data will be directly enteredinto the SEG driver 14 from a microcomputer or a PC in 4096 colors. 12bit data will be entered into the SEG driver via the error diffusionprocess controller 971 in 65 thousand colors. It may be configured sothat 12 bit data will pass through the error diffusion processcontroller 971 and will be impressed on the SEG driver 14.

[0724] Normally, as the voltage amplitude of the segment signalimpressed on the liquid crystal display panel requires ±5(V) or more,constant 10(V) pressure is required. For this reason, it is difficult tomake more detailed semiconductor process rule. As an example, themaximum pressure is 8.5 (V) when the SEG driver uses 0.35 μm process.

[0725] However, unless process rule gets detailed, the cell size of thebuilt-in memory increases. That increases the memory size of the chipand the cost. As an example, the memory size will be 40 mm² for 4096colors in 128×160 dots. The memory occupies ½ to ⅓ of the chip area. Thememory size problem restricts the built-in memory of the SEG driver 14and the number of display colors. This means that the bit size of eachpixel in the built-in memory may not be longer, because it increases thememory size and chip size.

[0726] The error diffusion process converts a large size of image datafor a pixel and a large image data to a smaller image data throughprocessing (error diffusion process). Therefore, it is very ineffectiveto keep the memory required for calculation for all pixels within thechip.

[0727] On the other hand, the error diffusion process controller 281consists of the operation memory 293 and the arithmetic circuit 291 asshown in FIG. 135. Namely, it consists of only logic circuits (in somecases, power circuits such as DCDC may be built in). Therefore, thecontroller 281 may consist of logic gates only, because nopressure-proof output stage is required. Namely, the controller 281 doesnot require high pressure-proof. For this reason, micro rulesemiconductor process is available.

[0728] As an example, 3.3 V pressure-proof 0.25 μm process is used. Thestandard cell size of 0.25 μm process is different from that of 0.35 μmprocess by two times in area. Namely, the memory made in 0.35 μm processcan be made in ½ area. Pressure-proof 1.8 μm process rule may be used.

[0729] The result data computed by the error diffusion processcontroller 281 is transferred to the segment driver 14 and stored in thememory 105. In consequence, the error diffusion process controller 281can be implemented on a smaller chip as micro rule is available. As theerror diffusion process controller 281 requires an arithmetic memory 283for only one line, the memory can be very small and implemented on asmall chip.

[0730] The controller 281 may have the capability to keep full screenimage data and apply subtractive process by the error diffusion processcontroller by reading the data. Data is transferred to the built-inmemory of the segment driver 14 through subtractive process. The segmentdriver should have prepared the minimum still image memory for 8 colorsand 256 colors.

[0731] It is desirable that the voltage circuit 201 consisting of a DCDCconverter is prepared in the controller 281. It is desirable that thecontroller 281 generates the reference clock and impresses this clock281 on the segment driver IC 14 so that the segment driver IC 14 cansynchronize with the controller 281.

[0732] I/F circuit 951 should be made on the controller 281 so that itfits the command interface circuit of the segment driver 14. Commandinterface of the segment driver IC 281 should be the same as that of thesegment driver 14. By this configuration, users (generally amicrocomputer) can enter commands into the controller 281 when thecommand is directly entered into the segment driver IC 14 as if userssend commands and data directly to the segment driver IC 14 without thecontroller 281 when the controller sends a command to the segment driverIC 14.

[0733] It is desirable that users can select an option by themselveswhether or not to apply dithering or the error diffusion process. Forexample, an option can be press button switch or touch panel on a mobiletelephone. Is may be configured to be indirectly switched by speechentry.

[0734] Image data could be transferred through dithering or the errordiffusion process. Further dithering the dithered image causes dotirregularity more conspicuous. Applying the error diffusion process tothe dithered image causes little image quality degradation. Therefore,it is desirable to adopt the error diffusion process for the controller281.

[0735] To achieve data input and output in 256 (512) colors with8-gradation display and 4096 colors with 16 gradation display on onechip, input and output format of the image data needs to be taken intoconsideration. For 256 colors, as the data for one pixel requires 3 bitsfor R, 3 bits for G and 2 bits for B, which totals 8 bits, 8 bits (onebyte) input and output can be achieved. However, for 4096 colors, thedata requires 4 bits for R, G, and B, which totals 12 bits. That means1.5 bytes which is odd.

[0736] To deal with this problem, the present invention has the methodto achieve two I/O formats shown in FIGS. 136(a) and (b) for 4096colors. Either or both of those two formats are practicable. Of course,one byte (8 bits) input and output is achieved for 256 colors.

[0737] Generally, 8-bit format or 16-bit format can be selected for dataI/O. There is an option for 86-family or 68-family. FIG. 136 shows theformat for 16-bit I/O.

[0738]FIG. 136(a) shows 16-bit input. The leading 4 bits should be leftblank. Input and output in this way facilitate understanding therelation between 16 bit address and pixel data. However, the blankdegrades transfer efficiency of data I/O.

[0739]FIG. 136(b) shows 8-bit input and output in principle. The address00H shall be for R and G and the address 01H shall be for B and R. Inputand output in this way complicates the relation between the address andpixel data while transfer efficiency of data I/O considerably improves.

[0740] The present invention enables switching formats shown in FIGS.136(a) and (b) by the reset command from MPU.

[0741] The error diffusion process controller 281 in the presentinvention has the function to pass the error diffusion processed datathrough to the built-in memory of the segment driver 14. It decodes thedata in the packet shown in FIGS. 131 and 97 and automatically decidewhether or not to pass the data before processing. Otherwise it followsthe command from MPU (microcomputer) and CPU (personal computer).

[0742] It is desirable that the error diffusion process controller hastwo or more built-in memory for {fraction (1/20)} line or more and ¼line or less of the screen area. The idea is to achieve optimum errordiffusion process considering absorption of the timing difference ofdata I/O and lines before and after the line for the error diffusionprocess. And it is to apply weighting process considering the image dataof the peripheral pixel as well as the error diffusion process anddithering as well.

[0743] Though this specification positions the controller 281 as thecircuit for error diffusion process for the sake of convenience, it doesnot intend to restrict the use to it. Namely, it is the device toconvert the size (number of bits) of the image data of one pixel enteredto a shorter data (with less number of bits) through computation andtransfers it to the built-in memory 105 of the segment driver 14. It isthe device to read image data from the built-in memory 105 and output itthrough reverse error diffusion process. There are many methods that cutdown the number of bits of the image data except the error diffusionprocess. An example of those is weighting process of the image dataearlier mentioned and dithering.

[0744] As the error diffusion process diffuses the error of one lineimage data on the next line in succession to the following line,basically it may hold the memory size for one line. Therefore, thoughdescription is made using the memory size for multiple lines in thefollowing examples, the purpose is to apply to others except errordiffusion process, or to improve general versatility or to use it forI/O timing control. Therefore, the present invention should not restrictthe memory size to multiple lines.

[0745] As an example image data, when the screen size of the liquidcrystal display panel is 128 dots (RGB) wide and 160 dots high, 8 linesor more and 40 lines or less memory size is formed. The memory sizeincreases as the precision of the error diffusion process increases(general versatility improves). Especially, the size should be increasedas the number of display colors increases.

[0746] We came to the conclusion that the following condition isdesirable as the result of reviewing image evaluation in the presentinvention. Namely, assuming that the number of bits is M (for 4096colors, M=12 because RGB requires 4 bits for each color) for the sum ofR, G and B of the display panel, the RGB total number of bits is N (for65 thousand colors, RG requires 5 bits each and G requires 6 bits.N=5+5+6=16) for the input data for error diffusion process and thenumber of line of the memory in the error diffusion process controller281 is S, it is desirable the following range should be taken.

[0747] N/M×4≦S≦N/M×32

[0748] Preferably, it is desirable to satisfy the following condition.

[0749] N/M×8≦S≦N/M×16

[0750] As is shown in FIG. 137, the error diffusion process controller281 shall have multiple units of arithmetic memory 293 shown above. InFIG. 137, one memory 293 a is for arithmetic processing and another isfor storing the data.

[0751] Conversely, to output image data, one memory 293 b is forarithmetic processing and another memory 293 a is for storing the data.

[0752] For example, a microcomputer (MPU) closes the switch SA1 of thememory 293 a to store image data. On the other hand, SB2 is closed andthe memory 293 b is transferred to the arithmetic circuit 291 for errordiffusion process. Computed result is sent to the built-in memory 105 ofthe segment (SEG) driver IC 14. The transferred data will be stored onthe built-in memory 105.

[0753] In the next phase, the switch SA2 is closed and the image data isstored on the memory 293 b. And, the switch SB1 is closed and the dataon the memory 293 a is put to the arithmetic operation. The computedimage data will be transferred to the built-in memory of the SEG driverIC 14. Namely, storing data and arithmetic operation are alternatelyperformed on the memory 293 a and 293 b.

[0754] As has been described, to diffuse errors on the image data by thegeneral sequential process, it is not required to switch memory 293 andneedless to say, the memory 293 for multiple lines are not necessary. Ifa memory 293 for multiple lines is equipped, it is advantageous to beable to divide a screen before processing. It is also advantageous tostore the data once and transfer the image data at a time (for multiplelines).

[0755] The image data is transferred with the divided screen. Forexample, when the screen size is 160 lines and the memory 293 a and 293b have 16 lines, the screen is divided into 10. Therefore, arithmeticoperation is made for every 16 lines. When the first 16 lines have beencomputed, they are then transferred to the built-in memory 105 and thenext 16 lines will be computed. The computed result will be sent to thebuilt-in memory 105. Therefore, when the image data has been computedten times, the error diffusion process for one screen finishes. As thedata needs to be transferred 10 times, it is effective compared to thecase when the computed result needs to be transferred one line at atime. It also enables low power consumption.

[0756] The segment driver IC 14 reads the image data on the built-inmemory 105 and displays the image on the display screen of the displaydevice 21. For a still image, once the error diffusion processcontroller 281 has finished processing and transferred the data to thebuilt-in memory, it doesn't need to operate anymore. Consequently, itautomatically stops the clock to DCDC converter 201 and drops its ownpower circuit to go into sleep condition. Sleep condition and operatingcondition may be switched by the command control from a microcomputer.

[0757] When a new image data is found, a microcomputer transfers acommand to the controller 281 and the error diffusion process controller281 impresses a clock on the DCDC converter to start its own power andfalls into the status of waiting image data input. When it receives animage data end command, it falls into a sleep condition.

[0758] In this way, as the error diffusion process controller 281switches between sleep condition and operating condition, it can achievelow power consumption for a still image that requires only arithmeticprocess for one screen. And as it has a small built-in memory requiredfor computation, the chip can be small. When the computed result issynchronously transferred to the built-in memory 105 one by one, it isneedless to say that it is configurable with an arithmetic memory 293for one line.

[0759] Though FIG. 137 shows that two memories 293 are used, this is notrestricted and three or more memories such 293 a, 293 b and 293 c may beused as shown in FIG. 138. This memory 293 is selected and used one byone.

[0760] In this way, the present invention is the configuration andmethod to reduce colors of the output data from the original image dataholding means such as a microcomputer by the error diffusion processcontroller and to store image data information on the image memory ofthe segment driver 14 which has less capacity than the original imagedata holding part. Reduce (color) information than the RAM storing theoriginal image before writing to the segment driver's RAM.

[0761] A border line caused by degradation appears simply by cutting offthe lower bits. To resolve the problem, the function part of the errordiffusion process controller 281, so called dithering and subtractiveprocess by the error diffusion method (degradation process, for example,8-bit to 6-bit conversion) should be applied. A border line caused bydegradation is protected by diffusing gradations in a spatial form. Thisprocess is effective to both still image and animation. Especially for astill image, the controller 281 handles the data for one screen andtransfers data to the built-in memory of the segment driver 14 andstops. From then on, only the segment driver 14 operates and exerts theeffect of low power consumption.

[0762] In short, integrating the image memory 105 a and the driver 292into the segment driver on one-chip IC provides a noticeable improvementof low power consumption because the image is displayed only byaccessing the built-in memory which has finished computing a stillimage.

[0763] Lookup table method gamma process part may be formed on thecontroller adding to the operating part. Of course, it could be anon-lookup table gamma changing means. One example is the method toconvert an image data to the gamma processed image data with the logicsuch as decoder circuit.

[0764] Lookup table should be configured so that it can be changedexternally. Namely, the data showing gamma curve (convertible to gammacurve) corresponding to the display device should be entered in theposition area of the memory 293 using RS232C bus, three-line system busand IIC bus. Entry may be made by reading the data from the ROM in themicrocomputer when the controller started and by transferring the data.And it may be configured to include gamma data on the transmissionformat in FIGS. 129, 130 and 131, decode it and store the data on thememory 293.

[0765] In this way, if it is configured so that gamma curve data can beexternally re-writable, the controller hardware can be compatible withvarious display devices even if it is originally the same.

[0766] Proper gamma characteristics will be achieved depending on thedisplay image data (images such as nature of the bright shore, figureand movies, image quality or atmosphere such as classic and popular).And the best image display can be achieved by including gamma data bestsuited to the transmission image data on the transmission formattogether with the transmission image data.

[0767] It is desirable to form RAM (RGB; 1 bit each) for 8-color displayon the controller 281. 8-color display is extensively used for menuscreens and waiting screen of a mobile telephone. Therefore, there aremany chances (time) for 8-color display usage. Reducing the powerconsumption for 8-color display is an essential technology for devicesrequiring low power consumption such as mobile telephones.

[0768] To achieve this low power consumption for 8-color display, datais read from the built-in RAM formed on the segment driver 14 to displayimages. Therefore, the controller 281 doesn't have to successivelytransmit the data, which achieves low power consumption.

[0769] The segment driver should achieve PWM drive function togetherwith additional 7FRC or 4FRC function. The controller successivelytransmits 4-bit/color data to the segment driver 14. PWM drive impressthis 4-bit data on the liquid crystal. The liquid crystal display panel21 displays 4096 colors in 4 bits. If 4FRC is implemented together, 2bits are added to the data. Namely, 6-bit/color display (about 260thousand colors) can be achieved by carrying out 4FRC four times on4-bit/color PWM data. 260 thousand color display requires 6 bits percolor. The upper 2 bits are for FRC. The lower 4 bits are for PWM drivein MLS method. If the upper 2 bits is 3, on/off FRC shows on, on, on. Asthe lower 4 bits are taken care of by PWM, the entire bit image will beon, on, on, gradation display by PWM. If the upper 2 bits is 2, on/offFRC shows on, on, off, or on, off, on or off, on, on. This on/offsequence is achieved to cause least flickers. As FRC processing is themethod to diffuse on/off status within a plane, it is generallyachieved. As the lower 4 bits are taken care of by PWM, the entire bitimage will be on, on, off, gradation display by PWM as an example.

[0770] If the upper 2 bits is 1, on/off FRC shows on, off, off. As thelower 4 bits are taken care of by PWM, the entire bit image will be on,off, off, gradation display by PWM. If the flicker is likely to appearin this case, adjust the sequence to on, off, PWM, off. As this does notgenerate off twice successively, a flicker is suppressed. In short,adjust the position of PWM properly.

[0771] An alternative is to have a 4-bit built-in memory for PWM in thesegment driver 14 with the upper 2 bits built in the controller 281 forFRC processing. If the image is a still image in 4096 colors, gradationdisplay may be achieved by PWM in 4 bits of the built-in memory in thesegment driver 14. This is not restricted to PWM and FRC may be anoption. This is not restricted to the memory for 4096 colors and amemory for 256 colors may be built in the segment driver.

[0772] Furthermore, 7FRC adds 3 bits. Namely, as it adds 3 bits to 15PWM(8+4+2+1), it can display about 2 million colors. Therefore, even thoughPWM can express only 16 gradations, it can switch between 260 thousandcolor display and 2 million color display in combination with 4FRC or7FRC.

[0773] PWM calculation is performed in the controller 81. The result ofMLS operation results in five-value voltage. This voltage value is addedby the weighting calculation (V2 is 2, V1 is 1, Vc is 0, MV1 is −1, MV2is −2). The result will be the absolute value of V2 and its sign (±) andthe absolute value of V1 and its sign (±). This data is sent to thesegment driver 14 and kept in latch for 1 hour. The segment driver readsthis data in latch and impresses it on the liquid crystal display panel.

[0774] It goes without saying that the present invention is applicablein the method of computing in consideration of correcting data insteadof weighting computation of the image data in combination of MLS and FRCor PWM or PHM.

[0775] In this way, the micro rule available controller can achievecomplex calculation by transferring the calculated result to the segmentdriver 14. Therefore, it is not necessary to for a logic circuit on thesegment driver 14 which may not be manufactured in micro rule as thespecified pressure proof is required. Consequently, low cost and lowpower consumption can be achieved.

[0776] In most cases, transmitted image data is not in the proper gammacharacteristics to be displayed on the display panel of the receivingterminal. For example, the data could be in gamma characteristics of 2.2power of CRT. The receiving terminal (such as those with the liquidcrystal display panel) converts (compensates) the data to the gammacurve appropriate to the display panel. Gamma conversion increases thenumber of bits of the image data. For example, 8-bit data becomes 10-bitdata. Namely, proper gamma processing increases the number of bits.However, as proper subtractive process is applied to the data by theerror diffusion process, the data with additional bits may betemporarily kept. The number of bits can be properly reduced bydithering and error diffusion process. Consequently, good image displaycan be achieved.

[0777] Of course, a still image stops gamma processing and neverincreases the power. With reference to gamma processing in the receivingterminal, it is needless to say that the configuration to transmit thedata through reverse gamma process in the receiving terminal ispreferable. This reverse gamma process is easily achieved by the lookuptable method.

[0778] RGB-specific gradation process may be applied. Basically,assigning more bits to green (G) and less bits to blue (B) improves theimage quality using the same amount of memory. For example, assign 5bits to G, 4 bits to R and 3 bits to B. As this method has moregradations in G which is more sensitive to human eyes, it can resolvethe graininess on even the coarse display panel against the spatialdiffusion method such as dithering and error diffusion method.

[0779] Circuit process part to suppress flickers may be included usingthe frame rate control (FRC) method on the controller 281. FRC circuitpart is large in scale. As the controller can be manufactured in microrule, the large scale circuit can be integrated with the controller.

[0780] Examples ever shown have been predicated on the liquid crystaldisplay panel. It is needless to say that the power reduction effect oncalling still images also works for light emitting display such asorganic or inorganic EL, fluorescent display device, PLZT displaydevice, display device using digital micro mirror device (DMD) developedby TI in the US.

[0781]FIG. 139 describes a transmission packet as in FIG. 131.Information such as image processing method (type of error diffusionprocess and dithering, weighting function and its type and data, gammacoefficient) and model number on the format to be transmitted. Includesuch information as to whether it is the image data taken by CCD camera,JPEG data, MPEG data, BITMAP data or its resolution. A mobile telephoneautomatically receives, decodes or detects and receives the data to beable to change in an optimum condition.

[0782] Of course, it is desirable to describe whether the transferredimage is an animation or a still image as is described in FIG. 131. Itis desirable to describe the number of frames per second for ananimation. It is desirable to describe the number of playback frames persecond recommended for the receiving terminal.

[0783] These items are also true for the sending transmission packet.The transmission packet explained in this specification does not need tobe a packet. Namely, it can be anything so long as the sending datacontains information described in FIGS. 131 and 139.

[0784]FIG. 139 shows the transmission format sent to a mobile telephone.Transmission means both sending and receiving data. In another word, amobile telephone may send the speech from the receiver or the imagetaken by the CCD camera attached to the phone to other mobile telephone.

[0785] It is desirable that the error diffusion process controller 281has additional function to apply reverse error diffusion process to theerror-processed data to the original data and apply error diffusionprocess again. Presence or absence of the error diffusion process shouldbe included in the packet data in FIG. 118. And the data required forreverse the error diffusion process such as error diffusion method(including dithering) and type should be included. As the other itemsare similar to those in FIG. 131, descriptions are omitted here.

[0786] The reason why the reverse error diffusion process executed isthat the error diffusion process can correct gamma curve in the process.There are some cases when the gamma curve on the liquid crystal displaydevice that received the data does not adapt to the received one. Andthere are cases when the received data is the image data that has gonethrough error diffusion process.

[0787] To deal with this matter, the reverse error diffusion process isapplied to convert to the original data so that the data may not beaffected by gamma curve correction. Then, the receiving liquid crystaldisplay device applies the error diffusion process to achieve theoptimum gamma curve for the receiving liquid crystal display.Especially, when the display device receiving the image data is a STNliquid crystal display device with FRC process, the difference betweendegradations is not linear. It is desirable to apply gamma process forthese STN liquid crystal display devices in accordance with eachgradation.

[0788] Generally, the image data in the display screen 107 is sent tothe upper left on the screen (number 1 to the arrow direction) as shownin FIG. 140. Therefore, image data is transmitted in forward direction(DATA1, DATA2, DATA3, . . . ) as described in FIG. 139. The errordiffusion process is also applied from the left to the right as shown inFIG. 141. As one of examples of the error diffusion process, itdistributes {fraction (7/16)} of the image data A in FIG. 141 to theleft image data, {fraction (3/16)} to the lower left one, {fraction(5/16)} to the lower one and {fraction (1/16)} to the lower right one.

[0789] In consequence, to apply reverse error diffusion process, imageprocessing should be applied in the reverse order of that in FIG. 140 asshown in FIG. 142. As shown in FIG. 142, apply image processing startingfrom Nth line to the arrow direction (N, N−1, N−2, . . . 1). One pixeldata should be processed in the reverse order of that in FIG. 141 asshown in FIG. 143.

[0790] However, the image data transmitted in the way as shown in FIG.139(b) may not be processed in the reverse order as shown in FIG. 142.For that reason, data is transmitted in the reverse order (DATAn,DATAn−1, . . . ) as a transmission format as shown in FIG. 139(c).Include the description to identify this reverse order data transmissionin the packet format described in FIG. 139(a). The receiver detects thisdescription and applies the reverse error diffusion (includingdithering).

[0791] Incidentally, though FIG. 142 describes the data is to betransmitted in reverse order, the reverse error diffusion process may beexecuted in forward order if the controller 281 has a certain amount ofmemory (see FIG. 122). This is illustrated in FIG. 144. FIG. 144describes the method to divide the display screen into multiple blocksA, B and C. One divided block is entered (kept) in the memory shown byFIG. 122. The data kept (such as A block in FIG. 144) is processedwithin the block in reverse order from 1 to 4. Though FIG. 144 showsthat the block keeps data for 4 lines, this does not mean that the datais restricted to have 4 lines. The data could have 2 lines, 3 lines, 5lines or more, Especially, as dithering handles 4×4 block process asshown in FIG. 132, the process method shown in FIG. 144 is convenient.And dithering may not be required to start processing from the oppositeline within the block in reverse order.

[0792]FIG. 116 is the circuit block diagram of the present invention.The gradation MLS circuit 106 shown in FIG. 116 is the circuit tocontrol gradation by MLS operation and frame rate control (FRC). FRCprocess is achieved by the data from the memory 105 and the gradationcontrol circuit.

[0793]FIG. 145(a) shows an example of seed functions. There are manyseed functions of orthogonal functions. MLS4 selects 4 lines of commonsignal lines at a time and uses 4×4 matrix seed function. Use theorthogonal function that contains −1 in each line (this is expressed ascontaining 1 in each line if the sign is expressed in reverse). If thereis a line containing two −1's, using the orthogonal function containingall 1 in a line generates more flickers. The reason it generates moreflickers seems that the segment IC outputs more V2 (MV2) voltage.

[0794] Therefore, it is desirable to adopt an orthogonal function thatcontains −1 in each line. (this is expressed as containing 1 in eachline if the sign is expressed in reverse.) The sign − and + holds trueeven in reverse from the logical viewpoint. Therefore, needless to say,the sign may be taken in reverse in the following description (positivelogic and negative logic may be reversed). Positive sign is simply takenfor easier explanation.

[0795] As shown in FIG. 145(b), common voltage aV corresponds when theorthogonal function is 1. V indicates the reference voltage and aindicates bias ratio. The orthogonal function 1 is replaced by the logicH (positive). The orthogonal function −1 is replaced by the logic L(negative).

[0796] Ideal bias ratio is determined by the number of lines on thedisplay panel for bias ratio a. It is logically expressed in the figurewith a decimal point such as 6.5. However, as the circuit generatesvoltage by multiplying the reference voltage, it will eventually be aninteger. Therefore, when the ideal bias ratio is 6.5, the bias ratio amust be either 6 or 7. It is desirable to adopt a larger integer thanthe ideal bias ratio.

[0797] As the bias ratio increases, amplitude value of the segmentsignal decreases and the generation of flickers is suppressed. In short,bias ratio 7 should be adopted. The scale of circuit may be made smallerby adopting even bias ratio from the circuit aspect. Therefore, 8 isbetter than 7 for the bias ratio. In another word, adopt an even valuethat is larger than the ideal bias ratio for the bias ratio a.

[0798] On/off ratio should be more than 1.067 for the adopted biasratio. 1.067 is the on/off ratio when the number of lines is 1/2 Of VGA,namely n=240. If the on/off ratio is less than this, it degrades theimage quality.

[0799] Though this will be described later, layer data that agrees withthe image data DATA (2:0) is selected by 1 bit (on or off) and 4 linesof bits makes B(3:0) shown in FIG. 86. The orthogonal function and thelogical operation shown in FIG. 145(c) for every bit will be applied tothis 4-bit B data for 4 lines. ON data 1 means −V voltage andcorresponds to logic 1 as shown in FIG. 146 for the image data.Conversely, OFF data 0 means V voltage and corresponds to logic 0. FIG.145(c) corresponds to the output on the common side and FIG. 146corresponds to the output on the segment side. For example, when thesegment side is −V voltage and the common side is aV, high voltage isimpressed on the liquid crystal layer. (ON voltage is selected andimpressed).

[0800]FIG. 86 is the block diagram of the gradation MLS circuit 106. Thegradation data shift circuit 111 has the gradation data consisting of atleast multiple registers. This gradation data is shown in FIGS. 147 and44. Output value of this gradation data shift circuit 111 is comparedwith the 3-bit data of DATA(2:0) to determine on or off. Four lines ofDATA(2:0) are read at the same time or one line is read at a time whenfour lines are selected at the same time: Four lines of data aregathered to make 4-bit B(3:0) of the output of the gradation selectioncircuit.

[0801] MLS4 is chosen for an example for easier explanation, the presentinvention does not restrict to this. 8 line simultaneous selection(MLS8) or 0.7 line simultaneous selection (MLS7) can be an alternative.Four lines of data are gathered to make 4-bit of the output of thegradation selection circuit for MLS4. However, eight lines of data areto be gathered to make 8-bit of the output of the gradation selectioncircuit. Consequently, the present invention should not be applied toonly MLS4 and may be applied to the driving method for other liquidcrystal display panel.

[0802] HSEL(1:0) signal shown in FIG. 86 is the 2-bit selection signaland selects each line of the orthogonal function with the 2 bits shownin FIG. 148(a). The orthogonal function is held in ROM in the segmentdriver 14 which transfers this orthogonal function to the common driverin every one hour (or selects the orthogonal function held in the commondriver). It is desired that the orthogonal function should be held onlyon the segment driver to minimize the hardware scale.

[0803] Orthogonal functions in FIG. 148(a) should be different in eachfield. The first field selects the first line of the orthogonal functionand uses-this for MLS operation with DATA. The second field selects thesecond line of the orthogonal function and applies MLS operation in thesame way. The third field selects the third line of the orthogonalfunction and applies MLS operation and fourth field selects the fourthline of the orthogonal function and applies MLS operation. MLS operationdescribed here is used for the convenience of explanation. Actually, asimple decoder circuit takes place instead of MLS operation. Each line(3:0) of the orthogonal function is outputted from the orthogonalfunction ROM 113 by the line selection signal HSEL (1:0). It isdesirable that the selection order of each line may be configured to bevariable. Replacing the line of the selecting orthogonal function mayproduce good results such as splicing reduction depending on the type ofimages.

[0804] Each line data IH(3:0) is entered in the inverse process circuit114. The inverse process circuit 114 inverses the data. The inverseprocess consists of normally white (NW) and normally black (NB)switching (NW/NB) and alternating circuit signal PM. PM is the signalpolarity switching signal of nH inverse drive.

[0805] The present invention achieves NW/NB switching by inversingeither of orthogonal function signs in the segment and common driver.Alternating circuit is achieved by inverting signs of both orthogonalfunctions in the segment and common driver at the same time. Inversingsigns of the orthogonal functions and achieving alternate circuit allowsmaller hardware circuit. It can be achieved by inversing 4×4=16 datafor the orthogonal function compared to the method to inverse signs ofimage data.

[0806] Actually, the orthogonal function is built in the segment driverIC 14 as ROM and successively transferred to the common driver IC 15from the segment driver IC. Therefore, the orthogonal function is notbuilt in the common driver IC 15 as ROM. In this way, hardware cab besmaller by adopting a serial transfer method. It is desirable that theorthogonal functions should be configured to allow transfer within achip using 2-line bus, IIC bus and RS232C outside of the driver chip. Itmay be configured to allow selection of any line by building 4 lines ormore orthogonal function lines in the segment chip as ROM.

[0807] The inversed sign of the orthogonal function is transferred fromthe segment driver IC to the common driver IC to switch NW/NB in theconfiguration where the orthogonal function is transferred from thesegment driver. Alternate circuit drive such as nH drive inverts thesign of the orthogonal function of the segment driver IC and transfersthe orthogonal function of this inverted sign to the common driver IC.Build in the orthogonal function whose signs for 4 lines are inverted asROM and select any one of orthogonal functions for 4+4=8 lines. It maybe configured for transmission. In this case, a hardware is nornecessary to invert and transfer the sign. Consequently, the driveroperation is made clear.

[0808] The present invention defines that the voltage impressed on theliquid crystal layer for PM=0 is negative and positive for PM=1 asdescribed in FIG. 148(b). The present invention defines that NW/NB is NB(normally black) for 0 and NW (normally white) for 1. Therefore, theoutput of the orthogonal function H (3:0) will be as shown in FIG.148(d) by NW/NB and PM signal.

[0809] MLS circuit 115 computes B(3:0) and H(3:0). Computation isperformed on each bit. Namely, computation is performed on thecombination of B(0) and H(0), B(1) and H(1), B(2) and H(2) and B(3) andH(3). Computation logic is shown in FIG. 145(c). The result will beQ(3:0). As it is clear from the logic in FIG. 145(c), Q is EX-NOR logic.

[0810] The addition circuit 116 counts the number of “1” bit in Q(3:0).The result of counting is S(2:0). This converter is shown in FIG. 149.However, the actual hardware is not an addition circuit and achievesaddition by a decoder circuit. The voltage selection circuit 117 turnsthe switch on based on the value of the output S(2:p) from the additioncircuit 116 and outputs this voltage to the segment signal line. Theresult of MLS operation shown in FIG. 150 corresponds to S(2:0). As aresult, voltage is selected based on the value of S.

[0811] In the explanation, MLS operation is performed in the gradationMLS control circuit and the result is summarized by the addition circuit116 for the purpose of easier explanation. This is not true in theactual circuit. MLS circuit and the additional circuit are integratedinto one. Specifically, they comprise the decoder circuit. The scale ofthe circuit can be made smaller by implementing the decoder circuit inthis way.

[0812] Consequently, MLS operation and addition are not performed. It islogically configured with the simple combinational circuit. To minimizethe scale of gate circuit, the image data is entered by having itinverted in advance.

[0813] Voltage value has 5 variations such as V2, V1, VC, MV1 or MV2 forMLS4. The relation between these 5 values is |V1|=|MV1|, |V2|=|MV2|,V2=2×V1, MV2=2×MV1 with VC in the center.

[0814] These processes will be done during 1 horizontal scan period(1H). Four common signal lines are selected at the same time during 1horizontal scan period (1H). The present invention generates at least 4clocks for 1H. Namely, the main clock is four times longer than 1H.

[0815] The drive circuit of the display device in the present inventionis specifically shown in FIG. 151. Namely, the signal process circuit202 shown by the dotted line in FIG. 86 is connected to each segmentsignal line in FIG. 151 respectively. The circuit block in the presentinvention illustrates the process circuit for one of R, G and B for theconvenience of explanation. The circuit will be about three times largerin scale for a color display device. This specification describes as ifthe device is a black and white display and dares not refer to colorprocessing including R, G and B. However, The specification does notrestrict this. Two-color display needs twice of black and whiterequirement and 6-color display needs 6 times.

[0816] The gradation data line 203 from the gradation data shift circuit111 is wired in the direction along the segment chip 14 in the segmentIC 14 as shown in FIG. 151. Gradation data shift circuit 111 iscontrolled by the control circuit 201. The power circuit 104 consistingof DCDC converters (such as charge pump) supplies power. The gradationdata line 203 is connected to the signal process circuit 202 one by onefor each gradation. The output of the signal process circuit 202 isimpressed on the buffer circuit 203 and is outputted to the segmentsignal line 206. V3 (MV3) voltage is impressed on the common signal lineby the common driver 165.

[0817] A sample of the gradation register is illustrated in theconfiguration in FIG. 147. The maximum number of registers is 13 in thisconfiguration. As the gradation number 0 is always off, gradationregisters may not be set up. The description is made for the convenienceof explanation. Likewise, as the gradation number 15 is always on,gradation registers may not be set up. The description is made for theconvenience of explanation As is shown in FIG. 152, gradation No.0 isshown by 0/1. Gradation No.1 is shown by 0/13. Gradation No.2 is shownby 1/7. Gradation No.3 is shown by 1/5. Gradation No.4 is shown by 1/4.Gradation No.5 is shown by 1/3. Gradation No.6 is shown by 2/5.Gradation No.7 is shown by 6/13. Gradation No.8 is shown by 7/13.Gradation No.9 is shown by 3/5. Gradation No.10 is shown by 2/3.Gradation No.11 is shown by 3/4. Gradation No.12 is shown by 4/5.Gradation No.13 is shown by 6/7. Gradation No.14 is shown by 12/13.Gradation No.15 is shown by 1/1.

[0818]FIG. 153 shows the adjacent data disparity of the gradation datamentioned in FIGS. 152 and 147. The gradation difference remains withinthe 20% range of the desired rate ({fraction (1/15)}=0.667). Therefore,there is no gradation skip, and a fine, 16 gradations can be displayed.Also, since the maximum frame value of gradation is 13, there is alesser chance of flicker occurrence, due to having a shorter value whencompared to 15.

[0819] The gradation data line 203 will be inputted in the signalprocess circuits 202. In the signal process circuits 202, an image data[3:0] will be inputted and the output of gradation data line 202 will beselected which rightly corresponds to the data.

[0820] As FIG. 147 shows, the inversion pattern for 0/1 of gradationno.0 will be 1/1 of gradation 15. The inversion pattern for 1/13 ofgradation no.1 is 12/13 of gradation 14. The inversion pattern for 1/7of gradation no.2 is 6/7 of gradation 13. The inversion pattern for 1/5of gradation no.3 is 4/5 of gradation 12. The inversion pattern for 1/4of gradation no.4 is 3/4 of gradation 11. The inversion pattern for 1/3of gradation no.5 is 2/3 of gradation 10. The inversion pattern for 2/5of gradation no.6 is 3/5 of gradation 9. The inversion pattern for 6/13of gradation no.7 is 7/13 of gradation 8. Therefore, the relationship ofthe bit of each register is as that of a mirror.

[0821] The inversion of gradation no.0 to gradation no.7 registers isequivalent to gradation no.15 to no.8. Thus, either a set of gradationno.0 to no.7 or a set of gradation no.15 to no.8 is available,restoration of other set can be possible. The present invention makesthe point to an advantage and abbreviates the gradation no.8 to no.15.

[0822] As being described on FIG. 151, on the segment IC14, thegradation data line 202 from gradation data shift circuit 111, thewiring is done on the chip 14 in a horizontal direction. Concerning thedata on FIG. 147, the gradation data line 202, there are 1 gradationno.0, 13 gradation no.1, 7 gradation no.2, 5 gradation no.3, 4 gradationno.4, 3 gradation no.3, 4 gradation no.4, 3 gradation no.5, 5 gradationno.6 and 13 gradation no.7. This statistics amounts to 51 in total. (Butthe gradation no.0 can be abbreviated.)

[0823] Since this is a case with having a single color, when this isRCB, the number will be quadruple, amounting to 153 in total. If thestructure of the register is not designed in the mirror relationship,the figure will be double, totaling of over 300, resulting in thegradation data lines to occupy a considerable space in the chip. When itis displayed in the frame rate control method (FRC), the length of data(denominator) that display gradation, or in other words, the number offrames becomes longer as the number of gradation increases. This willresult in the easy occurrence of flicker. Therefore, to control theflicker occurrence, it is more favorable to design the structure in sucha way that gradation register become shorter in length.

[0824] In order to achieve this objective, the present invention, asshown in FIG. 105, can be set so that the length of gradation registerbasically will be 8 and 12 or its common divisor. Actual exampledescribed in FIG. 105 shows 13 as the maximum denominator, whereas theactual example in FIG. 105 shows comparatively small number of 12 as themaximum denominator. FIG. 105 also shows a small number of 24 as theminimum common multiplier, thus setting the period of expressingcomplete gradation (period in which all of 16 gradations returns to thestarting position) to rather short 24.

[0825] By structuring like these, the chance of occurrence for splicingand flicker will be extremely low. The present invention selects anduses, for 8 gradation display, a portion of 16 gradation display ofgradation data patterns. (see also FIG. 107)

[0826] For 8 gradation display, the gradation register no.0 will be 0/1,1/12 for no.1, 1/4 for no.2, 1/3 for no.3, 1/2 for no.5, 3/4 for no.6,11/12 for no.7, and 1/1 for no.8 (among them, 1 is abbreviated).

[0827] In this case, one cycle that expresses all gradation will berather short figure of 12. Thus, even when the invented field shift isdone, the chance of flicker occurrence by cancellation becomes very low.This point also is for advantage.

[0828] In the 16 gradation display in FIG. 105, difference of brightnessof each gradation is practically equalized. Small number of maximumdenominator, which is 12, causes the lesser occurrence of flicker. Thisis not simply a matter of design, but is rather a well thought outinvented item after conducting image display and careful consideration.In FIG. 105, No.0 and No.15 are shown to make the explanation easier,but even without them, no doubt the circuit layout is possible.

[0829] In FIG. 105 the gradation register for No.0 is 0/1, 1/12 forNo.1, 1/8 for No.2, 1/6 for No.3, 1/4 for No.4, 1/3 for No.5, 3/8 forNo.6, 5/12 for No.7, 1/2 for No.8, 7/12 for No.9, 2/3 for No.10, 3/4 forNo.11, 5/6 for No.12, 2/3 for No.13, 11/13 for No.14, and 1/1 for No.15.Especially 1/2 for No.8 has a repetitive pattern of on and off and thusit has the characteristic of having no chance of flicker occurrence.

[0830] Also, since the maximum length of gradation denominator is 12,many of the common divisor of 12 (4, 3, 2, 6, etc) will be repeated inthe 12 frame by most of the gradation data (No. 1, 3, 4, 5, 7, 8, 9, 10,11, 12, 14). Therefore, interference in between the gradations isunlikely to occur. For image, too, the splicing is unlikely to happen.Data length of gradation registers No. 2, 6, and 13 is 8, and 8 have thecommon divisor of 4 and 2. This is in harmony with the common divisor of12. Therefore, the combined structuring of {fraction (1/12)} and ⅛ makesit very difficult to cause interference.

[0831] There are some reasons for adopting ½ of No.8. One reason is thatit has a pattern which the flicker is unlikely to take place and anotheris that even with the gradation data having no mirror structuring ofNo.6, there will be no ‘skip’ in between each gradations. When agradation pattern is set in the mirror position of No.6, the gap betweenthe 5/7 of gradation No.7 and 7/12 of gradation No.9 (if 1/2 ofgradation No.8 is not present, then the next will be No.9) becomes toolarge, creating a ‘skip’.

[0832] However, in FIG. 105 this gradation pattern is not limited. Forexample the structuring can be the one having inserted (replacedstructure) 1/7 to No.2 and 1/7 to No.13. Or 7/12 of No.9 can be deleted.1/5 can be set in between No.3 and No.4.

[0833] Having gradation patter shown in FIG. 105, the gradation displaycapability will be sufficient. Also conduct error diffusion process whennecessary in order to correct the gradation skips and make gammacharacteristic to a linear one. And by adopting area gradation displayfor error diffusion, the gradation figures can be increased, resultingin favorable outcome.

[0834] Control circuit 201 controls the gradation data shift circuit111, and the power will be supplied from the power circuit that consistsfrom DC, DC converter, and charging pump. As shown in FIG. 91, in thesignal processing circuit 202, gradation data wiring 203 is seriallyconnected in each gradation. And the output of the signal processingcircuit 202 will be impressed on the buffer circuit 204. In the buffercircuit 204, high impedance circuit is installed in order to preventpenetration current which may flow when each voltage (such as V2 and V1)is switched.

[0835] On MLS4, out of 5 voltage values in V2, V1, VC, MV1, and MV2,only 1 value will be selected and will be impressed on the segmentsignal line. For instance, when V2 voltage is impressed on the segmentsignal line at a certain time, MV2 voltage will be impressed on theaforementioned segment signal line at a next circuit clock. At thistime, if the operation amplifier that output V2 voltage and anotheroperation amplifier that output MV2 voltage simultaneously outputvoltage to the segment signal line 205, then a considerable amount ofpenetration current will flow.

[0836] In order to prevent the penetration current from flowing, thedisplay device of the present invention installs the analog switches forlow impedance at the output terminal of 4 operation amplifiers; V2, V1,MV1 and MV2. The analog switches will all be turned off at the switchingof voltage values. When the V2 voltage is being impressed on the segmentsignal line at a certain time, the analog switch that output V2 voltagewill first of all be turned off, then the analog switch which is formedon the output terminal of amplifier next to be outputted will be on.Thus 2 analog switches will never be on at the same time. As a resultthe penetration current will not be generated.

[0837] The period t in which all of these analog switches 1481 will beturned off shall be no less than 20 nsec and no more than 100 nsec. Ifthe value is less than 20 nsec, then due to the temperaturecharacteristic of semiconductor chip, the timing gap to output H pulsemay easily occur, resulting in high chance of generating penetrationcurrent. And when the value is more than 100 nsec, the execution valueof voltage which will be impressed on an optical modulation layers suchas liquid crystal layer becomes small, resulting in the corrugation ofsignal pulse 1261, or gradation variation through timing.

[0838] On the other hand, it was mentioned that the analog switches areused for switching voltage, but as long as this is a switching method,any equipment can be used. For example, transistors, photorelay orphototransistor can structure a switch circuit. Thus, as long as thevoltage or current can be controlled as on or off, any equipment can beused.

[0839] In order to prevent this penetration current from happening, thedisplay device of the present invention installed the preventionmeasures for penetration current occurrence between 5 voltage values;V2, V1, VC, MV1, MV2. Similarly, this will take place in common driver15. In the common driver 15, V3, VC, MV3 voltage are also switched andused. Just as the segment driver 14, for the common driver 15 will havean analog switch at the output terminal of the voltage which will beimpressed on the common signal line. During the switching of voltage, itshould be designed so that several numbers of voltage will not beoutputted to the common signal line at the same time.

[0840] When describing in more detail the signal processing circuit 202,it will be as in FIG. 154. The gradation data wiring 203 will have thedata inputted to the signal processing circuit 202 which are installedon each segment signal lines, one line for each gradation. On the otherhand, image data [479:0] (data here refers to 4 bit, 16 gradation andnumber of pixels per row is 129 pixels. Therefore, 4×120 =480) will beread out for one row at a time. This will then supplied to the signalprocessing circuit by 4 bits. Then the gradation data wiring 203 whichcorrespond to the data figures of this image will be selected, afterwhich the selected data (1 or 0) and orthogonal functions arecalculated. As shown in FIG. 147, it adopts the mirror inversion andtakes the circuit structure as described in FIG. 155 in order to restorethe data. The lower 3 bits of image data D [3:0] select the number forswitch S. Since the figures are the lower 3 bits, the value will bewithin 0-7. Thus, the switch S0-S7 can be selected. The selected datawill be impressed to the X-NOR A terminal. On the other hand, theuppermost bit D3 will be impressed to the aforementioned EX-NOR Bterminal. When D3 is 1, then the data of A terminal will be inverted. Inother words, data with mirror relationship will be outputted to the Cterminal. If D3 is 0, then the inversion will not take place.

[0841] By adopting such a structure, the mirror inversion can berealized. Therefore, approximately {fraction (1/2)} of gradationregisters can be abbreviated. Having this merit, a considerablereduction of the amount of gradation lines 203 can be implemented.

[0842] However, the output C of EX-NOR in FIG. 155 will be the output ofsignal processing circuit 202 in FIG. 90. When these process applies toMLS4, it will be repeated 4 times before it becomes B [3:0]. Of course,it goes without saying that when it is MLS2, it will turn out to be B[1:0], and when it is MLS8, it will be B [7:0].

[0843] The gradation pattern shown in FIG. 147 has sufficient gradationdisplay capability. Also, error diffusion process is conducted ifnecessary, and correct the gradation “skip”, and gamma characteristiccan be made to a linear one. By adopting area gradation display forerror diffusion, the gradation numbers can be increased, resulting in afavorable situation.

[0844] It is an important factor to reduce the oscillation value ofvoltage V3 and MV3 which are outputted from the common driver IC15. Thisway the pressure on the driver IC15 can be reduced, and unnecessaryradiation occurrence can be minimized. In order to reduce the voltagethat is outputted from common driver IC15, the dummy pulse will beweighed onto the signal that will be outputted from the segment driver14. The dummy pulse has the width of more than ⅛ of 1H and less than{fraction (1/16)}. Voltage amplitude is either V2 or MV2. Whether V2 orMV2 will be decided depend on the voltage which are outputted from 4common drivers IC. When 3 out of 4 selective voltage is V3, the dummypulse shall be MV2. When 3 out of 4 selective voltage is MV3 the dummypulse shall be V2. This way the even bigger execution values can beimpressed.

[0845] The MLS (L) drive, when it is compared with the conventional APTdrive methods, the scanning signal will be 1NL and data signal with beVL times, having extremely small bias proportions toward the scanningelectrode voltage and signal electrode voltage. The influence of havingsignal electrode voltage to the execution value will be extremelyimportant when compared to the APT drive method. As a result, when anydistortions or interference can be found on a series of signal electrodevoltage, it may give a strong impact to the nature of displaying.

[0846] However, when dummy pulse of the present invention is impressedon a signal electrode, a same execution rate voltage with much lowerreference voltage V of the signal electrode voltage will be impressed onthe liquid crystal. This will be even lower signal electrode voltage,and the influence this will have to the displayed image is reduced andthe image will become better in quality.

[0847] The above was supposed to be method to implement amulti-gradation display though the MLS driven FRC method. The presentinvention is not limited to that. The multi-gradation display may berealized through the following PWN (Pulse width modulation) method.

[0848] The whole or part of functions for segment driver 14, and thewhole or part of functions for controller 281 can be formed as one asdisplay parts 107 by the low temperature poly-silicon technique. The lowtemperature poly-silicon processing temperature is less than 600° C.,and large sized glass substrate may be used. The processing temperatureunder 600° C. can establish constant and high throughfootcrystallization technique. The TFT transfer frequency of this lowtemperature process using low temperature poly-silicon technology isapproximately 300 cm²·V·1·S·1. Operation in about 10 MHz is possible asa logic circuit, and easily exceed the 4 MHz clock of microcomputer ofmobile telephones.

[0849] By using the poly-silicon technology, it makes it possible toinstall not only driver but also the image controller in the liquidcrystal display panel. Several image signal is inputted onto the paneland these signal can be controlled and displayed on the liquid crystaldisplay. When compared with the one in which the circuit is installedexternally, it makes it possible to achieve low consumption of power,low cost and narrow frame.

[0850] By implementing nH inversion drive for the MLS drive, it will beeffective in controlling the flicker. This nH inversion refers to theinversion of signal polarity which will be outputted from the segmentdriver IC14 in each n×L rows on MLS (L) drive (For MLS4, L=4). Forinstance, when it is 9H inversion drive (n=9), then the MLS4 inverts thesegment signal at each 9×6=36 scanning lines. The following procedureswill be desirable for NH inversion drive in the MLS drive.

[0851] First, when the frame rate is over 80 Hz, n should be over 7 andyet the values should be odd numbers. Especially it is preferable to setthe n to greater than 3 and less than 9. Also, when the frame rate isbelow 80 Hz, n should be more than 3 and less than 9, while the valuesset at odd numbers. Especially, it is preferable to set the n to greaterthan 5 and less than 9. Also, the switching of n can be done by eithermanually by a user, or by automatic control by a microcomputer.

[0852]FIG. 122 shows the gamma look-up table 1451 that switches to gammafrom the image data (may refer to image data inputted externally) fromimage memory. In default setting the gamma look-up table 1451 itmentions as having linear characteristic (no gamma switching). Thisgamma table is overwritten from external (microcomputer) data andcontrolled to facilitate the characteristic to suit the image displaysection 107.

[0853] The input of gamma look-up table 1451 will be 8 bits in each RGB.This 8-bit data will be switched into 10-bit data by the gamma look-uptable 1451. By switching the data the gradation numbers will increase.When the bit numbers increase the hardware scale of image dataprocessing circuit becomes greater.

[0854] However, in the present invention, as a secondary step of thegamma look-up table 1451, error diffusion processing circuit 292operates in order to reduce the number of bits. Thus, in case the databit numbers increase at the gamma look-up table 1451, the bit numbersare immediately reduced through the error diffusion processing circuit292. After that the circuit scale can not expect to become any bigger.Since the gamma look-up table helps to switch into optimum gamma curve,color recreation can be increased and favorable image display can berealized.

[0855] In controller IC281 a reverse error diffusion processing circuit1461 is installed. The reverse error diffusion processing circuit 1461conduct reverse error diffusion process or reverse dither process to thedata which are sent after the error diffusion process or dither process.That means by implementing reverse error diffusion process or reversedither process, switching of the unprocessed original data such asdither process have been carried out.

[0856] The reason of implementing the reverse error diffusion process isthat in the course of process such as error diffusion process, thecorrections of gamma curves have been implemented. The gamma curves ofdata received devices such as liquid display device and other sent gammacurves may not be compatible. Also, there are cases in which the sentimage data have already conducted the process such as error diffusion.

[0857] In order to correspond to the situation, the reverse diffusionprocess is conducted, and the original data is switched so that therewill be no influence from gamma curve correction. After that, carry outthe error diffusion process by the received liquid crystal displaydevice in an effort to create optimum gamma curve into the receivingliquid display panel and yet become the optimum error diffusion process.Especially, when the data receiving display device is the STN liquiddisplay device that conducts FRC processing, the difference ofbrightness between each gradations will not be linear. For these STNliquid crystal display devices, it is desirable to carry out gammaprocess according to each gradation.

[0858] In addition, it is desirable for the display device to equip withtemperature sensors that detects or measures the temperatures of thedisplay panel 21. The output of this temperature sensor is detected bymicrocomputer (calculating or controlling means such as CPU), and fromthe detection result, data switching table of gamma look-up table 1451and error diffusion processing circuit 292 will be overwritten.

[0859] For example, in the case of STN liquid crystal display panel,when temperature becomes low the starting voltage becomes high. In otherwords, during NB mode, even if voltage is impressed the light'spermeating volume (or reflective volume) will be less. When thetemperature becomes higher the starting voltage becomes lower andacquiring large amount of light's permeating volume (reflective volume)with small amount of voltage will be possible.

[0860] Therefore, by changing the table of gamma look-up table 1451, thegamma characteristic that corresponds to the temperature variations canbe realized. By changing data switching table, each RGB will be able tomake adjustments individually.

[0861] The same can be said for error diffusion processing circuit 292.Temperature becomes higher and viscosity of liquid crystal becomes less.As a result, flicker occurrence will be more frequent. The flickeroccurrence can be controlled by changing data values for error diffusionprocessing. Also, the microcomputer 1692 controls to prevent flickeroccurrence from happening by controlling circuits such as theoscillation circuit 101 and changing the frame rate.

[0862] Frame pulse (OVD), field synchronized field pulse (OFD), and linepulse (OLD) which is synchronized to the shift signal of 1 horizontalscanning period or a common scanning line are taken to external space.By controlling so that the data can be overwritten to the memorysynchronous to this pulse, image data can be written favorably, which issynchronous to the image data reading status. Thus, the occurrence ofimage display dispersions will be extremely rare. 16 gradations can bedisplayed in the gradation data shown in FIG. 105. However, the maximumvalue of gradation data length is 12, which is quite long. At frame rate120 the value will be 120/12=10, which in turn results in 10 frames/sec.Therefore, it is not appropriate for the displaying of animation.

[0863] To take measures on this problem, for animation display thegradation data (No.0, No.2, No.2, No.6, No.8, No.11, No.13 and No.15)which are below the maximum value of gradation data length from thegradation data in FIG. 105 are selected and show the image on thedisplay. The number of gradations will decrease to 8 gradations but thegradation data length will be 8 in maximum. For frame rate 120 the valuewill be 120/8=15, which in turn results in 15 frames/sec. Therefore,favorable animation display can be realized. Due to this reason thegradation data shown in FIG. 105 is a desirable gradation data.

[0864] When voltage value is MLS4, there are 5 values; V2, V1, VC, MV1and MV2. The relationship of these. 5 values, having VC in the centerare as follows; V1=MV1, V2=MV2, V2=2×V1, and Mv2=2×MV1. The powercircuit of the present invention will be explained later using FIG. 156.

[0865]FIG. 156 is the power circuit for display devices of the presentinvention. For FIG. 151, 201 will be appropriate. However, both V3 andMV3 do not occur inside the segment driver IC15, but rather the V2voltage will be impressed into common driver IC15. It is desirable togenerate V3 voltage inside the common driver IC 15 from the impressed V2voltage. This is because the V3 (or MV3) voltage exceeds the withstandpressure of the segment driver 14. If it is configured to generate inthe segment driver IC14, then the withstand pressure of the segmentdriver IC will need to be created by withstand pressure process ofcommon driver IC. When that will be the case, then the size of the chipwill be very large.

[0866] The input power voltage of this power circuit will only be havinga single power input, which is the VCC (primary input potential) and VSS(secondary input potential). Also, the latch pulse LP will be inputtedthat consist of pulse generated at every horizontal scanning period(1H). However, the latch pulse is configured so that the frequency canbe altered within the range between +10% and −10%. The frequency canalso be changed to either to double or half. This is because when thelatch pulse is 1H, sidelines in each 4 rows on the display monitor ofdisplay panel 21 will appear.

[0867] The clock forming circuit, according to clock signals (LPsignal), is basically necessary in the charge pump circuit and will formseveral clock signals of different signals. VCC or VSS will be used forpower source.

[0868] Primary circuit 441 generates the primary voltage using VCC andVSS voltage as a reference, followed by the inputting into the nextelectron volume 442. The electron volume 442 will equip the function ofaltering voltage at least in 32 steps. Preferably, it will be better toconfigure in the way so that this alteration can be done in over 64steps. This electron volume 442 voltage becomes the reference voltageVC.

[0869] The electron volume circuit, to be more specific, is a circuitstructure shown in FIG. 157. The electron volume circuit implementsresistance partial pressurization to the voltage between the TAP1 andTAP2 in order to generate voltage VC0 which will be inputted to VCgenerating circuit. External resistance R1, R2, and R3 will be connectedin between VEV-TAP1, TAP1-TAP2, and TAP2-TAP3. Voltage will be appliedto the built-in resistance between TAP1 and TAP2 and acquire resistancedivided voltage VC done by the switch.

[0870] Positive directional double booster circuit 443, setting theelectron volume 442 voltage VC as a reference, generates the voltage V2by double boosting VSS and moving to the positive direction by chargepump movement. Similarly, the tertiary booster circuit 444, setting V2and V3 voltage reference, generates by 3, 4 or 5 times boosting thevoltage V3 to the positive direction by charge pump movement. Theswitching of 3, 4 and 5 times boosting can be done by using commands.

[0871] Negative directional double booster circuit 445, setting VC andV3 as reference, generates the double boosted voltage MV3 by charge pumpmovement to negative direction. ½ descending pressure circuit 446generates the voltage V1, which evenly divided in between V2−VC, andalso the voltage MV1, which evenly divided in between VC−(MV2) by chargepump movement. Or, applying resistance or transistor partial pressurecan generate it.

[0872] For central potential VC, the VC will be used. Also, MV3 thatcorrespond to VSS will be used as well. These are sufficient to generatethe voltage which drives the liquid crystal display device. In thispower circuit, the output voltage V3 and MV3, V2 and MV2, and V2 and MV2is symmetric to VC. However, the section of ½ circuit 446 adopts thecircuit structure as shown in FIG. 158. That means the voltage outputsuch as V2, V1, MV1 and MV2 will be outputted by mediating through theoperational amplifier 451, since it requires constant current output.But since VC is the central voltage, the operational amplifier 451 maynot be needed. Also, since V3 and MV3 voltage are to be used for commonscanning, and the output current is very few, there is no need to haveoperational amplifier 451. Of course, there would be no problem toinclude the operational amplifier 451 in the structure.

[0873] ½ circuit 445 section, to be more specific, is configured asshown in FIG. 158. VC0 that was generated at the electron volume circuitwill be amplified to generate the VC voltage. The operational amplifierconsists of current vomitory main operational amplifier PVC and alead-in sub-operational amplifier PVCS. In order to prevent penetrationthe vomitory and lead-in have the differential input transistors whichare set asymmetrically in off-set positions. The asymmetry proportionsare over 0.5% and less than 5%. It will be preferable to set below 1%and less than 3%.

[0874] The amplification is connected to the resistance so that it willbe VC=2VC0. However, the resistance value R1 between VSS−VC and theresistance value R2 between VC−V2 are equalized. It would be ideal toset as R1=R2, but at least the difference of the proportion needs to beless than 2%.

[0875] The VI and MV1 operational amplifier consists of the operationalamplifier for vomitory and lead-in. The main amplifier of V1 is the onefor vomitory and that of MV1 is the one for lead-in. Vomitory andlead-in vary input voltage to prevent penetration. The difference ofvoltage between the main and sub amplifiers is defined as {fraction(1/200)}×V2. This difference of input voltage shall be {fraction(1/200)}×V2 or more and {fraction (10/200)}×V2 or less. It is desirablethat it should be {fraction (1/200)}×V2 or more and {fraction(6/200)}×V2 or less.

[0876] Though FIGS. 156 and 158 are the specific block diagram, they aretoo complex to understand the following description. Therefore,description will be given assuming the structure shown in FIG. 159.

[0877] Though the drawing shows 445 for ½ partial pressure and 472 forresistance, this is not a restriction. For example, Voltage V1 and MV1may be generated by partial pressure of multiple MOS transistors. It mayalso be generated with the charge pump circuit. It may also be generatedusing the (MOS) transistor resistance and the volume as shown in FIG.160. It may be configured to change partial pressure ratio by arrangingmultiple ladder resistances and selecting any position by an analogswitch ASW as shown in FIG. 161.

[0878] As is shown in FIG. 156, the voltage required to drive the liquidcrystal is generated by multiplying the reference electronic volume 442.However, the problem lies in generating the highest volume V3 and MV3used for the common driver IC. The volume could exceed the pressure thatthe common driver IC can withstand. V2 and MV2 voltage used for thesegment driver IC 15 brings up the same problem.

[0879] The description is given taking the volume V3 and MV3 used forthe common driver IC for easier explanation. Therefore, V2 and MV2 forthe common driver IC may be addressed according to this V3 and MV3 andthe description for it is omitted.

[0880] The resistance to pressure of the common driver IC 15 is decidedby V3−(−MV3). For example, if the resistance to pressure of the commondriver IC 15 is 18V, V3=9 and MV3=−9V decided by V3−(−MV3) is themaximum. However, the voltage exceeds this resistance to pressure whenthe electronic volume is adjusted by the contrast adjustment andtemperature compensation. Especially, as STN liquid crystal requireshigher voltage to gain the defined transmittance as the temperature getslower, the voltage may exceed the resistance to pressure in lowtemperature. The common driver IC will be damaged by over-pressure.

[0881] The conventional driver IC had no other method than to controlthe maximum step value of the electronic volume 442 using amicrocomputer. However, even though the problem lies in the lowtemperature, big margin is required to control the volume by step value.Big margin requires higher resistance to pressure of the driver in thesemiconductor manufacturing process. Higher pressure-proofsemiconductors will have larger process rule and chip size.

[0882] To deal with this problem, the output voltage from the referencevoltage generating circuit is impressed on the maximum voltagegenerating circuit (not illustrated) and the electronic volume 42. Themaximum voltage generating circuit consists of the charge pump circuitand generates MAX pressure-proof voltage (actually the voltage lowerthan MAX voltage by the defined value). Temperature compensation is madeto this voltage by the thermistor or the feedback circuit to avoidinfluence from the ambient temperature.

[0883] On the other hand, the electronic volume 442 varies steps by acommand and output voltage. This output voltage is then converted by thetertiary booster circuit 444 and the negative double booster circuit 445to V3 and MV3.

[0884] Assume that the output voltage of the maximum voltage generatingcircuit is Vm and that of the booster circuit is Vb. These Vm and Vbwill be compared with the comparator. The capacitor circuit formedinside the comparator has the constant hysteresis and delay. Therefore,if Vb exceeds Vm, H level voltage is outputted. If Vb does not exceedVm, L level voltage is outputted. Once Vb exceeds Vm, it won't become Llevel voltage unless it gets lower than Vm voltage by the definedvoltage. The reason is that the display device will function unstably bythe frequent switching between H level and L level.

[0885] When the electronic volume control circuit receives H levelvoltage input, it controls its step value so that it won't increase.Therefore, even if a user operates the electronic volume to adjustcontrast and brightness, the final output voltage Vb of the electronicvolume won't increase. That prohibits the common driver IC fromexceeding the withstand pressure.

[0886] It may also be controlled by providing a separate temperaturesensor (not illustrated) to prohibit the step value of the electronicvolume 42 from changing by the output of the sensor. The important thingis to separately provide a defined voltage for the withstand pressure,compare it with the drive voltage of the liquid crystal display paneland control the means to change reference voltage such as an electronicvolume.

[0887] Normally, V3 (MV3) voltage is formed in the common driver IC 15and generated by the power circuit consisting of DCDC converters.Therefore, the tertiary booster circuit 444 and the negative doublebooster circuit 446 are built in the common driver circuit 15. V3, V2,V1, VC, MV1, MV2 and MV3 may be all generated by the common driver 15and V2, V1, (VC), MV1 and MV2 voltage may be applied on the segmeritdriver IC 14.

[0888] To avoid the pressure-proof problem of the said common voltage V3(MV3), the dropped V3 voltage may be generated and impressed on thecommon driver IC 15.

[0889]FIG. 162 shows that multiple partial pressure resistances 472 areplaced between V3 (MV3) voltage and V2 (MV2) voltage to generate thedropped voltage V3 (MV3) by switching the electronic switch SW. Twoswitches out of multiple ones turn on at the same time. SW1 a and SW1 bare ganged together. SW2 a and SW2 b are ganged together. SW3 a and SW3b are ganged together. SW4 a and SW4 b are ganged together.Consequently, the drop rate of V3 and MV3 will be equal.

[0890] Changing the voltage of V3 (MV3) will change the bias ratio a.Dropping V3 will lower the bias ratio a. Lowering the bias ratioincreases the amplitude of the segment signal relatively compared tothat of the common signal. It also increases the contribution ratio ofthe segment signal. That easily generates flickers or causes lowcontrast.

[0891] To deal with this problem, it is desirable that the voltage dropin FIG. 162 should be in increment of 1% or more and 3% or less and themaximum drop should be within 15% against V3 voltage. The impedance islowered by the operation amplifier 451 for the output of the electronicvolume. The operation amplifier 45 can be omitted when the power of V3(MV3) is small. The power of the operation amplifier 45 shall be V3 andV2, MV3 and MV2. This power specification allows reducing the powerconsumption used for the operation amplifier.

[0892] As a matter of course, the power of the operation amplifier 45may be V3 and V1, MV3 and MV1. As shown in FIG. 156, as V1 (MV1) voltageis generated by V2 voltage, using V1 (MV1) voltage increases the cost.It also increases the power consumption as the current flows from V3(MV3) to V1 (MV1).

[0893] V3 (MV3) voltage can be dropped externally using a microcomputerby adopting the circuit structure in FIG. 162 as shown above. Thiseventually resolves the pressure-proof problem of the common driver IC15. Adjusting V3 (MV3) allows suppressing low frequency swell generatedin low frame rate (less than 40 Hz). This low frequency swell is thephenomenon that variations of images generate in 10 Hz or less and moveup and down on the screen. To reduce variations of images, it iseffective to adopt the drive method that decreases n of nH inverse driveto 7 or less.

[0894] If the low frequency swell generates, it is suppressed byslightly lowering the V3 (MV3) voltage. Therefore, to display 8 colorsin low frame rate, the electronic volume switch in FIG. 162 should beswitched by the command from a microcomputer.

[0895] To suppress the low frequency swell, the ratio of V2 and V1 (MV2and MV1) may be varied. The method to vary the ratio of V2 and V1 andits circuit structure will be described in FIG. 163.

[0896]FIG. 162 shows the structure of one operation amplifier. This isnot a restriction and may b a structure of the main and sub amplifierssuch as 451 a and 451 b as shown in FIG. 158. Adopting the structure oftwo amplifiers shown in FIG. 158 produces good results such assuppressing voltage fluctuation.

[0897] These descriptions are concerning the common driver IC and alsoapplicable to the segment driver IC. The circuit structure and themethod described are applicable by reading V2 voltage of the segmentdriver IC 14 for V3 of the common driver IC 15.

[0898] As has been described, ideally, the absolute value of V1 and thatof MV1 should be equal and the absolute value of V2 and that of MV2should be equal. The relation of V2=V1×2 and MV2=MV1×2 shall stand.Actually, this setting causes the phenomenon to easily generate crosstalk.

[0899] To deal with this, the value of V2 should be smaller by 0% ormore and 5% or less for V1×2 when the image (display panel) is in NBmode, It is desirable that it should be smaller by 0.5% or more and 3%or less (V1×2>V2).

[0900] Conversely, the value of V2 should be larger by 0% or more and 5%or less for V1×2 when the image (display panel) is in NB mode, It isdesirable that it should be larger by 0.5% or more and 3% or less(V1×2>V2).

[0901] Having the value within the range prevents generating cross talkon the display screen and helps achieving good image display. The reasonof this seems to relate to the fact that images tend to darken byreducing V2 in NB mode and cross talk generation is inconspicuous evenwhen the value is slightly off the ideal value.

[0902] To review this reason and the variable range, a black window isdisplayed on the reflex STN liquid crystal display panel in NB mode asshown in FIG. 164. The central part on the screen shows the part of 0%brightness (black) and the peripheral (A, B part) shows the reflective(or transparent) part of 50% brightness. Originally, the A and B partsshould be in the same 50% brightness. However, actually it is affectedby the central part C and the transparency of B part is lower than thatof A part (Transparency may be improved in some liquid crystal mode).FIG. 165 shows the graph of the rate of this transparency change.

[0903] The y-axis of FIG. 165 represents transmission ratio. 0%represents the case in which the transmission (reflectance) rate of thepart A is equivalent to the rate of the part B. Therefore, if the part Abecomes dark, the ratio becomes a negative value. X-axis represents theratio between the voltage V2 and the voltage V1 (V2/V1). In this case,V2=−MV2 and V1=−MV1. Ideally (theoretically) V2/V1 equals to 2.

[0904] If the ratio of V1 to V2 is changed, keeping other conditions atthe same and plot it on the graph, it seems that the transmission willbe most stable when the ratio V2/V1 is 1.975, i.e. 1.5%, if the displaymode is normally black (NB). The reason why we mention “it seems” isbecause the outcome varies depending on the sizes of the windows, etc.

[0905] Another reason why we mention “it seems” is that we actuallydidn't evaluate the outcome with only the windows displayed but weevaluated it with many natural images on the display, considering crosstalk status synthetically. Therefore, the graph in FIG. 165 should beunderstood as a conceptional diagram for the explanation probably.Consequently, the transmission ratio represented by the graph in FIG.165 does not necessarily mean the transmission ratio measured by aninstrument.

[0906] At any rate, in the case of NB mode, when V2/V1 ratio was smallerthan 2, interference such as cross talk didn't occur (or difficult torecognize) and we could get the clear images on the display. Inaddition, the difference was around −5% in this case. The ideal figureof the difference exists at the center part of −5% and 0% or −3% and 0%.It means, in the case of NB mode, V2 value should be 0-5% smaller thanV1×2. More desirably, 0.5 to 3% smaller than V1×2 (V1×2>V2).

[0907] As is seen in the graph of FIG. 165, the curve that representstransmission ratio is apt to become sharper when the transmission ratiogoes over some −3%. Even on the actual display, when the transmissionratio went over 3%, vertical lines tended to appear on the naturalimages in large numbers, and deteriorated them notably. The 3% of thetransmission ratio represents 100/3=33, i.e., over −30 resolution. Evenfor the recent television sets, 32 tones for the display is consideredenough. Therefore, if the difference is under some 3%, the realizationof the difference may be difficult. For this reason, it is decent tokeep the V2/V1 ratio so that the transmission ratio does not go over−3%.

[0908] On the other hand, as FIG. 165 shows, when the display panel wasin the mode of normally white (NW), the outcome was completely reverse.Therefore, if the mode is NW, V2 value should be larger than V1×2 by 0to 5%. More desirably, 0.5 to 3% larger (V1×2<V2). By keeping thisdifference, it is possible to avoid the cross talk of the displayedimages as much as possible and get a balanced relationship.

[0909] The problem is that the ratio of V2/V1 varies depending on theliquid crystal mode, the materials used for the liquid crystal, theambient temperature, or the displayed images. With the displayed images,if 8 colors are displayed, even though the V2/V1 ratio is farther than 2relatively, the images are unlikely to be effected by the factors suchas cross talk. On the other hand, if the natural image is displayed with4096 colors, it is likely to be effected. Therefore, it is desirable tochange the V2/V1 ratio depending on the ambient temperature, the numberof colors displayed, etc.

[0910] The present invention is structured so that you can change theV2/V1 ratio externally using commands by picking up one from the 8different ratios. FIG. 163 represents the circuitry diagram. You changethe dividing-voltage ratio of the dividing-voltage circuit 503 throughthe voltage control part 501 and then accordingly change the V2/V1ratio.

[0911] One example structure of the voltage control part 502 is thevolume structure illustrated in FIG. 163(b). The object of the controlis not limited to the resistance value but can be the current value orthe voltage value. Here, in order to simplify the case, the object isassumed to be the resistance value. It is desirable to set the structureso that the voltage ratio can be changed with the increments of minimum0.5% or 1% towards V2/V1=2. In addition, with regard to the IC chip, itis desirable to set the structure so as to change the chip among 4 to 16different grades.

[0912] The partial pressure circuit 503, as shown in FIG. 163(b), hasthe volume that can be changed at specified steps. In other words, itchanges the voltage of V1 or V2 by changing the tap, resulting in achange of ratio of V1/V2. It can modify the tap location from anexternal command. To be more specific, in similar to FIGS. 161 and 162,the analog switch (ASW) is arranged in a specified location of partialpressure resistance R, and the optional analog switch (ASW) should beconfigured so that it enable to turn on and off by 3-bit command (D0, D1and D2).

[0913] When (D2, D1, D0) is at 0, decoder 521 will select the terminalG0 and turn on the analog switch ASWO. When (D1, D2, D0) is at 1, thedecoder 521 will select the terminal G1 and turn on the analog switchASW1. When (D1, D2, D0) in at 2, the decoder 521 will select theterminal G2 to turn on the analog switch ASW2. What follows is a similarprocess.

[0914] In addition, it is assumed by the present invention that thepartial pressure ratio V2/V1 is changed by command, but it is notlimited to that case. For example, for producing the liquid crystaldisplay panels, either the NB or NW is selected at the time of modulecompilation. In other words, there are no instances in which one paneluses NW mode at one time and NB mode at another time (or very unlikely).Therefore, when the display panel in NB mode, V2/V1 ratio should be setlower, within the range of 0.5% to 3%. In other words, the V1/V2 ratioshould be set with values smaller than 2. If the value of V1/V2 is to belocked, there is no necessity to adapt the partial pressure circuit 503(FIG. 163b) and neither does the voltage control circuit 501.

[0915] To lock the V2/V1, the resistance values R1 and R2 in FIG. 160should be locked. In addition, the size the MOS transistor or channelwidth of W transistor should be set at the predetermined values.

[0916] As shown in FIG. 166, there is also a method to modify throughthe mask pattern. In FIG. 166, reference numeral 532 is the ladderresistance, which is connected in series (resistance wiring). Thecontact section (the connection) is formed in the connection of ladderresistance 532. On one hand, the ladder resistance fence in this way,532 is wired to 533, using a metal wire. On the other hand, when thismetal wiring 533 is connected with the contact sections 531 and 532, itcan modify the V1/V2 ratio. Hence, it is V1 voltage that will beoutputted to metal wiring 533.

[0917] In FIG. 166, the connected line 534 is formed with a mask method,and the ratio of V1/V2 is being locked. In addition, at the time of thechip formation, V1/V2 ratio can be changed. Therefore, in NW mode, themodification, which connects the contact holes 531 a and 531 b, ispossible. And during the NB mode, it can be modified so that contactholes 531 c and 531 d are connected. Because of the latter, the driverchip can be produced for both the NW and NB mode with only one maskmodification.

[0918] As shown in FIG. 163, if commands are decoded from the MPU andconstruct an external switch method 502, then the V2/V1 ratio controlwill become so easy and if NW/NB switch method is constructed, theswitching of NW mode and NB mode becomes just as easy.

[0919] Another problem is that the liquid crystal changes its viscositydue to temperature changes, as well as the screen responsiveness. Forthis reason, the proper V1/V2 ratio is vital to maintain the temperatureof the liquid crystal display panel. The results of the examination haveshown that as temperature increases, it is more desirable to make theV2/V1 ratio as much closer to the ideal rate of 2. In order tocorrespond to the problem, a temperature sensor should be installedseparately and after considering the output result of the temperaturesensor, the partial pressure ratio (V2/V1) should be controlled.

[0920] By the way, the partial pressure circuit 503 would mean toconsist both mechanical constitution and also all electric constitutionusing analog switches. In addition, it is good to make the structure sothat the partial pressure will change by a mechanical relay or lightemanations, varying the resistance value as a result. Although thepractical example described above is the case of MLS4, but the contentsof the present invention can be applied in the case of other drives,such as MLS6 and MLS8, because the V2/V1 relationship also occur inthese cases.

[0921] The selective voltage of V3 or MV3, of opposite polarity, isderived from the common driver IC. By adjusting this V3 voltage (MV3),it is possible to adjust the brightness of the display panel. As for theV3's variable range, it should be within the range of +10%, it isdesirable at ±5%. The adjustment for the V3 is relatively easy;simplifying the circuit can do it.

[0922] Furthermore, the 451, assuming it is the operational amplifier,but it is not limited to the latter, is good even in the emitterfollower circuit of the transistor when the current output is small.There is no necessity as far as the operational amplifier is concerned.

[0923] As has been shown, the drive circuit, drive IC (the driver)specifications, constitution and drive method and/or the base plateconstitution of 11 and 12 (FIG. 4, FIG. 5 and FIG. 6) of the presentinvention will realize a display with ultra-low power consumption,high-quality and light-and-small. If an information display device suchas the portable telephone, which is explained in FIGS. 87 and 126, iscomposed using the display system of the present invention, it will alsoachieve ultra-low power consumption on high quality. These points willbe applicable to the following examples of the practical use of thedevice.

[0924] An information display device shall mean whatever type of devicewith display panel(s). Therefore, the technical scope of the presentinvention is not limited to portable telephone; laptop or fixed devicesmay be included in the category. These points will be applicable to thefollowing examples of the practical use of the device.

[0925]FIG. 167 represents an elevation view of information displaydevice. However, in order to simplify the explanation, every detail isillustrated or modified. The segment driver IC 14 is arranged at the topand bottom of the display screen 107. The common driver IC15 is arrangedin the right and left side. As for the portable telephone, because theelectric power conversion is desired low, the drivers of the IC 14 andIC 15 have been designed respecting these specifications. Using thesedrivers IC, for the information display, it is possible to achieve highquality with low electric consumption.

[0926] In the information display device described in FIG. 167, thedisplay part 107 a and 107 b are not to be differentiated; it iscomposed of two base plates 11 and 12. In FIG. 167, in order to simplifythe explanation, the line has been drawn in the central part of thedisplay part. The base plate for 107 is made of plastic. Theconstitution and the features of the display panel, which use theplastic base plate, have already been explained. It is possible toseparate the base plates when using the several pairs of base plates 11and 12.

[0927] The information display device in FIG. 167 possesses thecomponent circuit like in FIG. 125, as well as the communicationfacilities, memo function, Internet function, dictionary function etc.The information concerning the error-diffusion processing has beenexplained before. As is shown up to this part, all the points indicatedin these details of the claims can be applied mutually.

[0928] The information display device in FIG. 167, the operation of thesegment driver 14 a and the common driver 15 b, indicates the graphic inthe display part 107 a. The operation of the driver 14 b and the commanddriver 15 b are shown in the display part 107 b. Therefore, it ispossible to use two screens simultaneously.

[0929] In addition, as shown in FIG. 168, the picture A (107 a) and thepicture B (107 b) are represented together as forming one body.Furthermore, regarding FIG. 167, the number of pixels as follows,horizontally 320 dots×0.3 (RGB), vertically 120 dots. In addition, theletters are basically represented horizontally. The basic size of oneletter is 16 dots (RGB)×16 dots vertically. In addition, 4 times theangular indication with command settings (32 dots (RGB)×32 dots), itdiscontinues the functional MLS4 drive, the identical voltage to the 4common signal conductors (V3 or MV3); it has a function to indicate 16times in the indicatory mode.

[0930] As shown in FIG. 169, the segment driver IC14 a, the 14 b and thecommon driver IC15 a are all connected in circuit using the voltage unit201, which is recognizable, by the driver. 15 b. The voltage V1 occursin the voltage occurrence circuit 201 (MV1) and VC are integrated in thesegment driver IC14. In addition, V3 (MV3) is integrated in the commondriver IC 15. Like in the above, this will occur in the voltage circuit201 respecting the segment driver 14 a, which use a common 14 b. Inaddition, a difference in the brightness of the picture will not happendue the common voltage used by the common driver 15 a in relation to 15b.

[0931] Furthermore, we assumed that the voltage occurrence in thecircuit 201 is provided, but it is not something limited to this case.The V3 (MV3) generates voltage with common driver IC15 a; it is possiblethat the same voltage be used for the common driver IC15 b. In addition,the V2 (MV2) and the V1 (MV1) generates the voltage necessary for boththe segment driver IC14 a and the IC14 b.

[0932] In addition, the V3 (MV3), V2 (MV2), V1 (MV1) all generate thevoltage for the common driver IC15 a, IC15 b, IC14 a and the IC14 b. Inother words, each segment driver IC provides the change function for theslave or the master driver using the generated voltage.

[0933] As stated in FIG. 169, dividing into screen A107 a and the screenB107 b, when it indicates the picture, it is necessary to divide for themicrocomputer (not shown in the drawing) when dealing with graphics.

[0934] In FIG. 168, it divides the graphic data of the picture A and thegraphic data of the picture B due to a memory set function. The segmentdriver 14 a transfers the data from the picture A to the segment driver14 b for the picture B.

[0935] The graphic data distribution is made in relation to the logicsignal of H and L of the tip/chip selection terminal of the segmentdriver IC14. As for the data of picture A and the data of picture B, asstated in FIG. 169, it is necessary to put in a state where the90-degree display position is converted. When the graphic data is read,it also does the 90-degree conversion by calculating it.

[0936] The display of the image is easily achieved by dividing the datainto the segment drivers 14 a and 14 b due to address calculations,possibly by a microcomputer. In addition, the segment driver will adoptthe liquid crystal panel for the portable telephone and similar devices,at a low cost and with low electric consumption.

[0937] In addition, in FIG. 167, the apparition of the picture ispossible using two common driver IC. Because it has made theconstitution of the arrangement 15, it is possible that the result makesnarrow angle of view. Therefore, the compact display of information canbe formed.

[0938] As for the simple matrix liquid crystal panel display type, asfor the extent the limit ratio, where the number of scanning linesincrease, it becomes unclear. In addition, the necessary voltage for thecommon driver IC becomes high. In order to cope with this problem, thescanning lines should be decreased. In FIG. 168, the number of scanninglines decreases; it is the execution example when it forms theinformation display in FIG. 167. It makes the length of picture Ashorter than B. The segment driver IC14 is arranged vertically indisplay screen 107, the common driver IC15 is arranged horizontally.

[0939] Furthermore, it is possible at the time of the constitution ofFIG. 167, with the portion of the picture or the entire picture as atouch panel specification. It indicates the menu in the picture when thetouch panel is formed. It follows this menu and enables the user toselect. In addition, the base plates 11 or 12 and the touch panel, it ispossible to form one body using the F.r.p corrugated sheet. Furthermore,the key 265 and plastic base plate, it is possible to form 11 and 12into one body. This way, it is possible to increase the general purposeof the touch panel.

[0940] In addition, the indicatory mode switch 1785, explained in FIG.170, it is possible to arrange the reflections transmitted to theselector switch 1786. As a proper thing, it can also apply to the otherexecution examples mentioned above.

[0941] In addition to the display part 107 a, it draws up the 107 b witha plastic bas plate in FIG. 167. In the display part 107 c, it ispossible to draw up the 107 d with a glass base plate. The fact that theliquid crystal panel breaks when using a plastic base plate for theindicatory panel when pushing pressure is involved, this can beprevented by the use of glass. The display part 107 a designates the 107b as the liquid crystal display panel as a reflected type. It ispossible that the display part 107 c, the 107 d as a liquid displaypanel of semi-transmitted type or transmitted type. In the exterior orin the interior, it can avoid being influenced by the environment byselecting the liquid crystal display panel, which looks at the picturemainly. This way a satisfactory picture indication can be actualize.(Exteriorly, the liquid crystal display of reflected type. Interiorly,liquid crystal display of transmitted type.) It also makes the blackbinary indications according to the environment. The number ofgraduation indications changing, it makes the field sequentialindication which indicates the picture of the RGB. By making the blackreflection indication, it is possible to change the color's substance.

[0942] As for the execution example explained above, it is possible toapply this theory to other facets of the present invention. In addition,it possesses the several examples of the pictures. It is not somethinglimited to the liquid crystal display panel, it is also possible toapply the above to other display panels like the EL panel, the PLZT andsimilar ones.

[0943] The display of the present invention can be used with thetransmitted type, the reflected type and the semi-transmitted type. Whenused with the reflected type, illumination is necessary in a darkenvironment. As an illumination expedient, the self-luminous elementsuch as LED, EL and the fluorescent tube, the above can be used.Especially when the white LED lights up, the direct current (voltage),it is beneficial to use because it is compact.

[0944] The derived optical board, with the black light system is goodwith the front light/write system. In addition, the material is goodwith each transparent resin material such as acrylic and polycarbonate.It is good even with inorganic material such as plate glass.

[0945] The white LED as a luminous element (Light Emitting Diode) is aNichiya Kagaku product. The YAG (yttrium aluminum garnet) is sold tothose which apply the fluorescent system to the tip/chip surface of theGaN blue LED. In addition, Toyota synthesis (inc.) sells the white LED,which is applied, to the fluorescent substance of red, blue and green tothe blue LED. Sumitomo Electric Industries (inc.) uses the ZnSematerial, which it produces.

[0946] Especially as for the white color LED to be used with the presentinvention, it is preferred to use LED circuit element of GaN type. ThisLED circuit element causes short wavelight emission and makes itpossible to obtain white color by fluorescence from a fluorescentsubstance through triggering the fluorescent substance contained in thetransparent stopping resin by adjusting In contents of emission layer.As for the fluorescent substance, it is preferable to use 3 types, redcolor, green color and blue color light emission. For white color LED,the color of emission is determined only though the proportion of lightemitting power of the fluorescent substance because the output from LEDcircuit element is short wave light. Because each of the fluorescentsubstances has excellent temperature characteristic and the color oflight emission is determined by the mixture proportion of fluorescentsubstances, it has the feature of high productivity and excellenttemperature characteristic. Also, the fluorescent substances can be twotypes, yellow color and red color. It is because LED of blue color andfluorescent substance of yellow color only cannot take the balance ofcolor due to the lack of the wave of red color.

[0947] However, light emission circuit element is not limited to whitecolor LED. For example, when displaying a picture field-sequentially,only one of R, G, B emission light or multiple number of the LED can beused. Also, the structure to locate LED for R, G, and B densely togetheror in parallel and synchronize those 3 LEDs with the indication ofindicator panel to turn on field-sequentially is acceptable. In thiscase, it is preferable to place light diffusion plate on the side oflight emission. By placement of light diffusion plate, inconsistency ofthe color is prevented.

[0948] In the present invention, the segment driver IC14, 15 etc. weredescribed as produced with silicon chip. But it is not limited to thatand it can be produced using production process of indication area 107with the use of technology such as high temperature polysilicontechnology, low temperature polysilicon technology or semiconductorprocessing technology. Also, drivers etc. can be connected to stripeshape electrode, using COF, TAB, COP or COG technology.

[0949] The light modulation layer of indicator device in the presentinvention is not limited to liquid crystal but 9/65/35PLZT or6/65/35PLZT of thickness of about 100μ is also acceptable. Also, lightmodulation layer 24 with added fluorescent substance or liquid crystalwith added polymer ball or metal ball is acceptable. Very small ballsdistinguished by the color of black and white is acceptable too.

[0950] For example, silicon base plate 11 or one with formed organic ELstructure on 11 as illustrated on FIG. 171 is also acceptable. Anoptical interference film of multi-layer derivative is formed on theorganic EL structure. Multi-layer derivative 1771 is, as explainedbefore, the layer made of low refractive index derivative films and highrefractive index derivative films placed on top of each other. In otherwords, it is a derivative mirror. This multi-layer derivative 1771 has afunction to make the color tone of the light emitted from organic ELstructure better (filter effect).

[0951] Multi-layer derivative 1771 functions as reflection preventionfilm. Conventional protection film for organic EL has been thick plateetc. and it is ruled by Snell's law. Therefore the light comes out oforganic EL structure to all the directions are all reflected on thesurface of the thick plate mentioned before. As a result, it is notreleased into the air (outside) from the thick plate mentioned before.

[0952] But in the case of multi-layer derivative 1771, the thickness isvery thin. Therefore when forming by multi-layer derivative asprotection like in the present invention, Snell's law does not apply. Asa result, the light comes out of organic EL structure is released intothe air (outside) from multi-layer derivative 1771.

[0953] The organic EL structure has a weak point of lacking humiditytolerance. The multi-layer derivative 1771 is made of many lowrefractive index derivative films and high refractive index derivativefilms placed on top of each other. Thus there is no pinhole occurrence.Therefore the organic EL structure is not exposed to the outside air.This means there is no issue of deterioration of organic EL structure tooccur.

[0954] Incidentally, the organic EL structure may implement simplematrix drive, it is desirable that to implement an active matrix typedisplay with the thin film transistor (TFT) or thin film diode (TFD)formed on the pixel. Especially, two TFT shall be formed on one pixel. 4TFT or more on one pixel to achieve low power consumption and preferably6 TFT shall be formed.

[0955] Small, light and backlight-less high quality display device canbe structured by configuring a mobile telephone, terminal or informationdisplay devices shown in FIGS. 87, 126, 167 and 170 using the saidorganic EL structure display panel or display device.

[0956] Transparent electrode such as striped electrode was explained asITO in the display device in the present invention. This is notrestricted. For example, transparent electrode such as SnO₂, indium,indium oxide is an another alternative. Thin film deposited by the metalsuch as gold may be adopted. Organic conductive film, ultra-fine graindispersion ink or transparent conductive coating agent “Sintron”commercialized by TORAY may be used.

[0957] Examples of the present invention have described the activematrix type with switching elements such as TFT, MIM and thin film diode(TFD) arrayed for every pixel electrode. This active matrix type or dotmatrix type includes the liquid crystal display panel and DMD (DLP)developed by TI to display images by the angle change of micro mirror.

[0958] The switching element such as TFT is not restricted to oneelement per pixel and multiple elements may be connected. It isdesirable to adopt LDD (low doping drain) structure for TFT.

[0959] Though matters concerning FRC control method and frame rateswitching have been described based on STN binary liquid crystal, theyare applicable to the TFT multi-value gradation liquid crystal.Generally, TFT liquid crystal is a multi-value output signal line driver(equivalent to SEG driver 14) and 64 gradation and 256 gradation driverare not suitable to mobile liquid crystal from the aspect of power andcircuit structure. As a result, the method to display multi-gradation in8 and 16 gradation driver and frame rate control is adopted. Even inthis case, high degree of flexibility may be obtained like STN by havingvariable frame rate according to the number of colors, namelygradations.

[0960] Technical idea of implementation examples of the presentinvention is also applicable to liquid crystal display panel, EL displaypanel, LED display panel, FED (Field Emulation Display) panel and PDP.This does not mean the specification is restricted to the active matrixtype and the simple matrix type can be an alternative. The simple matrixtype also has a pixel (electrode) at the intersection and can beregarded as the dot matrix type display panel. As a matter of course, areflection type of the simple matrix panel is within the scope of thepresent invention. It goes without saying that it is applicable to thedisplay panel displaying simple signs such as 8 segment, characters andsymbols. This segment electrode is one of pixel electrodes.

[0961] As is shown in FIG. 172, it is desirable to be configured toachieve partial display on only the display area 107 a to attain lowpower consumption during waiting. The range register should be providedto show the start position and range of the partial display area. Theregister number storage circuit to store the register number and thecomparative circuit to compare the received number with the registernumber registered in the described register number storage circuitshould be provided.

[0962] The color of the area 107 b outside the partial display areashould be changed according to the received number. For example, if theregistered number is pertinent to a company, blue should be displayed onthe display area 107 b and if the number is pertinent to a family, greenshould displayed. Namely, the image processing circuit shall be providedto change the color of the area outside the said partial display area bythe output from the said comparative circuit. This control allowsdecision without checking the receiving number.

[0963] These were the implementation examples of information displaydevices. However, information display devices include video cameras witha display monitor shown in FIG. 173 as well as a mobile telephone. FIG.173 shows the example suited to a video camera. The present invention isapplied to the direct vision monitor (a liquid crystal display panel oran organic EL display panel) 21 and viewfinder section.

[0964] The display panel 21 can be folded and stored in the storage 1783of the video camera body 1782. The video camera body 1782 is equippedwith the photo lens 1781 and the eyepiece cover 1784 of the viewfinder.

[0965] The display device and information display device of the presentinvention is equipped with the display mode switch 1785. The displaymode switch 1785 switches between NW mode and NB mode. It displays theimage in NW mode when the outside light is general (normal). Wide fieldangle display can be achieved in NW mode. NB mode is used when theoutside light is weak. As an observer views the light reflected on thepixel electrode when the liquid crystal is in transparent status in NBmode, the bright display image can be viewed. The field angle isextremely narrow.

[0966] However, as the display image can be viewed in good conditioneven when the outside light is very weak, there is no harm in personaluse for a short time. Generally, as NB mode is used less frequently, itshould be configured to be normally in NW mode and switch to NB mode ifthe display mode switch 1785 is kept on pressing. If the outside lightis weak, the light emitting element should be lit, or the display panel21 should be illuminated using both the outside light and the lightemitting element.

[0967] The display device and information display device of the presentinvention is equipped with the reflective transmission switch 1786. Thereflective transmission switch 1786 switches the data of the contrastadjusting circuit 1681 and the gamma lookup table 1451 to display theimage in transmission mode and in reflection mode, because gamma isdifferent in transmission mode and in reflection mode. The reflectivetransmission switch 1786 enables switching gamma curve with a singletouch.

[0968] As the reflective transmission switch 1786 compensates gammacurve, it is used to get the optimum display condition from the colortemperature of the outside light. The color temperature of the incidentlight into the display panel 21 under the illumination of anincandescent lamp is about 4800 k reddish white, about 7000 k bluishwhite under the fluorescent lamp of daylight color and about 6500 kwhite under the sunlight outdoors. Therefore, the color temperature ofthe display image on the display panel 21 can be changed using thereflective transmission switch 1786. This feel of incompatibility isespecially significant when we move from under the illumination of afluorescent lamp to under the illumination of an incandescent lamp. Wemay be able to normally view the display image by selecting thereflective transmission switch 1786.

[0969] The incident angle of the light into the display panel 21 isadjusted by rotating the lid 1787. Rotate the lid centered on therotation center 1871. This configuration allows good incidence ofnarrow-oriented light into the display panel 21.

[0970] This specification refers to the integrated component having atleast light source such as a light emitting element (light generatingmeans) and the image display device (light modulating means) thatdoesn't emit light by itself such as a liquid crystal display panel as aviewfinder.

[0971] Video cameras include not only a camera using video tape but alsoa camera, electronic still camera and digital camera that record imageson FD, MO and MD, and an electronic camera recording images on the solidmemory.

[0972]FIG. 174 is the sectional view to explain the viewfinder. Theviewfinder in FIG. 174 uses the display device 21 of the presentinvention. The lens array 1813 and convex lens 1804 are arranged on theoutgoing surface on the display panel 21. The light emitted from theopening 1812 illuminates the display panel 21. The micro lens 1814converts the light to narrow directional light.

[0973] The convex lens 1804 has the function to collect light modulatedby the light modulation layer such as liquid crystal layer and organicEL. That makes the effective diameter of the magnifying lens smallerthan that of the display panel 21. Due to smaller magnifying lens, theviewfinder can be made lighter in lower cost.

[0974] The magnifying lens 1802 is attached to the eyepiece ring 61803.An observer can adjust the focus to the visibility of his eye 1816 byadjusting the position of the eyepiece ring 61803. As an observer viewsthe display image with his eye 1816 close to the eyepiece cover 1784,narrow directivity of the light from the backlight (light guiding plate)1815.

[0975]FIG. 175 is the explanatory drawing (sectional view) of theviewfinder in the implementation example of the present invention. FIG.175 shows that the transparent block with parabolic mirror converts thelight from the light source placed at O point (see FIG. 176) andillustrates the display panel 21. Transparent type or semi-transparenttype of the present invention is used for the display panel 21.

[0976] The transparent block 1791 is the concave mirror with the focus Oas shown in FIG. 176 and converts the light emitted from the focus O toparallel light by reflecting the light with the reflection plane(reflection film) 1793. The reflection film 1793 is not restricted tothe complete parabolic form 1791 and may be elliptical form. Namely, itcan be anything as long as it converts the light emitted from the lightsource to almost the parallel light. For example, prism plate (prismsheet) and phase film may be used. Light emitting element is notrestricted to point light source and may be a linear light source like atenuous fluorescent lamp. For example, parabolic mirror can betwo-dimensional.

[0977] As shown in FIG. 176, if the light emitting element is a pointlight source, the back of the diagonally shaded area 1791 (transparentblock) is deposited by the film such as Al and Ag to form a reflectionplane 1793. The reflection plane 1793 can be dielectric mirror or theone using diffraction effect as well as those with metal material suchas Al and Ag deposited. The one with the reflection plane 1793 mountedon other member may be installed.

[0978] The light 1806 emitted from the white LED 1805 as light sourceenter the transparent block 1791. The entered light 1806 a is convertedto the narrow directional light 1806 b and enters the display panel 21.The light collected by the field lens (convex lens) 1804 enters themagnifying lens 1802. The field lens is formed by polycarbonate resin,acrylic resin and polystyrene resin. The transparent block 1791 shouldbe formed with the same material. Among others, the transparent block1791 should be formed with polycarbonate resin.

[0979] The polycarbonate has wide wavelength dispersion. However, itpresents no problem if it is used for illumination without an effect ofcolor drift. Therefore, it should be formed with polycarbonate resinthat takes advantage of high index of refraction.

[0980] High index of refraction allows ample parabolic curvature andsmaller plane. It may also formed with organic or inorganic glass. Orthe one with gel or liquid filled in the lens-form (concave) case may beused. Or it may be a concave bowl-form whose parabolic plane is partlyworked (a part of normal concave mirror is used instead of transparentmember).

[0981] If the reflection plane is formed with the metal thin film suchas Al, it should be coated by UV resin or with SiO₂ and magnesiumfluoride.

[0982] The reflection plane 1793 may be formed with metal thin film andreflection sheet and metal plate may be affixed. Or, it may be formed bypaste application. A reflection film formed on the other transparentblock may be mounted on the transparent block 1791. Optical interferencefilm may be a reflection plane 1793. The part C (see FIG. 176) iscentrally illuminated by the light emitting element 1805C as shown inFIG. 176 in the present invention.

[0983] Directional light emitting element may be used, because theilluminating range C (see FIG. 176) is narrow. That improveseffectiveness of light It allows effectively illuminating theillumination area of the small display panel 21. In this sense, it ismost suited to (white) LED whose light emitting part is small. Theposition of the light emitting element may be displaced from the focusO. That simply changes the apparent size of the light emitting area ofthe light emitting element. If it is placed outside the focus distance,the light emitting area grows larger. If it is placed within the focusdistance, the illuminating area normally becomes smaller.

[0984] For this reason, the present invention uses only half part fromthe center line of the parabolic mirror and does not use the lowerposition of light emitting element as passing area of the illuminatinglight.

[0985] Assuming that the diagonal length of the effective display areaon the display panel 21 is m (mm) (the pixel-formed area viewable fromthe observer who views images on the viewfinder)

[0986] And focal distance of the parabolic mirror 1791 is f (mm), thefollowing relation shall be satisfied.

[0987] m/2 (mm)≦f (mm)≦3 m/2 (mm)

[0988] When f (mm) is shorter than m/2 (mm), parabolic curvature becomessmaller and forming angle of the reflection plane 311 grows wider. Thisincreases the depth of the backlight, which is not desirable. Sharpangle of the reflection plane causes the problem of easily generatingluminance difference on the margin of the display area 21.

[0989] On the other hand, when f (mm) is longer than 3 m/2 (mm),parabolic curvature increases and the position of the light emittingelement is raised. Likewise, this increases the depth of the backlight.

[0990] If the white LED is chip type, the diameter of the light emittingarea is about 1 (mm). There is a case when the parabolic plane is big, acase when the diagonal length of the effective display area on thedisplay panel is long and a case when the diagonal length of 1 (mm)diameter is small. Namely, the directivity of the light entering thedisplay panel 21 will be too narrow. Depending on the design of angle ofview of the magnifying lens 1802, taking more distance from the eye tothe eyepiece cover 1784 reduces visibility of the display image if thelight emitting area of the light emitting element is small. Therefore,it is better to enlarge the light emitting area by placing a diffusionplate on the outgoing side of the light emitting element 1805.

[0991] The white LED 1805 employs constant current drive. Employingconstant current drive reduces the variation of temperature dependentlight emitting luminance. LED 1805 allows reducing power consumption byemploying pulse drive with light emitting luminance kept high. Dutyratio of the pulse shall be 1/2 to 1/4 and the frequency shall be 50 Hzor more. Flickering will occur if the frequency is as low as 30 Hz.

[0992] It is desirable that the diagonal length d (mm) of the lightemitting area for LED 1805 should satisfy the following relationassuming that the diagonal length of the effective display area of thedisplay panel 21 is m (mm).

[0993] (m/2)≦d≦(m/15)

[0994] Preferably, it is desired to satisfy the following relation.

[0995] (m/3)≦d≦(m/10)

[0996] When d is too small, directivity of the light to illuminate thedisplay panel 21 becomes too narrow and the display image viewed by anobserver gets too dark. On the other hand, when d is too large,directivity of the light to illuminate the display panel 21 becomes toowide and the contrast of the display image reduces.

[0997] As an example, assuming that the diagonal length of the effectivedisplay area on the display panel 21 is 0.5 (inch) (about 13 mm), thediagonal length or the diameter is 2 to 3 (mm) is appropriate for thelight emitting area of LED. The size of the light emitting area can beeasily achieved to meet the purpose by fixing or placing the diffusionsheet on the outgoing plane of the LED chip.

[0998] Quasi-parallel light means the light with narrow directivity anddoes not refer to complete parallel light. It can be a lightconcentrating to the optical axis or a diffusing light. Namely, it isused to mean the light not from the diffusing light source like asurface light source. These matters are naturally applicable to otherdisplay devices in the present invention.

[0999] It is desirable that inner surface of the body 1801 should be inblack or dark color to absorb dispersed light by light modulation layerssuch as liquid crystal layer and organic EL light emitting layer inFIGS. 175 and 177. This is to absorb unnecessary light by the body 1801.Consequently, it is effective to apply black paint on the ineffectivearea (the area where the light effective to the display images cannotpass through) of the display panel 21.

[1000] Light modulation layers such as liquid crystal layer disperse ortransmit the intensity of the voltage impressed on pixel electrodes.Otherwise they change the polarizing direction. The transmitted lightpasses through the magnifying lens and reaches at the eye 1816 of theobserver.

[1001] As the eyepiece cover 1784 in the viewfinder fixes the scope ofthe observer, the area to be seen is very limited. Therefore, even ifthe narrow directional light illuminates the display panel, ample angleof visibility can be achieved. That helps extensively to reduce thepower consumption of the light resource 1805.

[1002] As an example, surface light source method required 0.3 to 0.35(W) power consumption of the light source in the view finder using 0.5inch display panel 21, while the viewfinder of the present inventioncould achieve the brightness of the same display image by 0.2 to 0.04(W).

[1003] The observer views the displayed image by fixing the eye 1816with the eyepiece cover 1784. The focus is adjusted by moving theeyepiece ring 1803. The light source 1805 is not restricted to one ormore multiple sources may be used.

[1004]FIG. 175 uses one liquid crystal display panel whereas FIG. 177uses two liquid crystal display panels 21.

[1005] As is shown in FIG. 177, high-resolution image can be displayedwith the low-resolution liquid crystal display by displaying the imageinterpolating the display panel 21 a and 21 b. And high resolution andbrightness display can be achieved by converting the display panel 21 ato the brightness (Y) display panel and forming the color filter on thedisplay panel to be a color (C) display panel. An example also showsthat the liquid crystal display panel 21 b or R light modulation, thedisplay 21 b for B light and G light modulation. Two-color filter may bemosaically formed on one display panel.

[1006] Though the display panel 21 is mainly treated as the liquidcrystal display panel in the viewfinder of the present invention, thisdoesn't mean this is restricted. It goes without saying that the selflight emitting type display panel such as fluorescent light emittingpanel (such as FED), organic EL or inorganic EL may be used. If thedisplay panel 21 is the self-light emitting type, it is needless to saythat it requires no illumination means such as backlight.

[1007] To display with the field sequential method, LED 1805R for R, LED1805G for G and LED 1805B for B, as shown in FIG. 177, are located. Inaddition to these LED 1805 for R, G and B, LED for W (white) can beused.

[1008] Apart from these LEb1805 for R, G and B, LED composed of threeelementary colors; cyanogens, yellow and magenta, can also be used. TheLED 1805 should be located as densely as possible. At the same time, alight diffusion plate (not shown in the drawing) is set on the emissionside. This contributes to enlarge the emission area of LED and alsorestrict the emergency of irregular colors caused by the distributedemission points of LED for R, G and B. The number of LED for R, G or Bis not limited to one each. It is acceptable to use two LED for G andone each for R and B as long as the color balance is well considered.

[1009] The light emitted from LED 1805 is condensed through the lens1804. The condensation explained in view finder and other items is usedfor making the chief ray of divergent rays parallel or semi-parallel.The light may be designed to become convergent, or the chief ray may bedesigned to spread depending the display area of the display panel 21 orthe aperture of the magnifying lens 1802.

[1010] When the display panels 21 a and 21 b modulate the same color,the LED 1805 synchronizes with the applied picture signal of the panel21 and lights up corresponding LED 1805. This is called ‘fieldsequential display’. The LED 1805, in a case where it emits white, isusually responsible for display (drive). In a case the panel 21 amodulates G light and the panel 21 b does B light, LED 453G and 453Bsimultaneously light up. This means: when the panel 21 a modulates Glight and the panel 21 b does B light, LED 1805G and B are lighted up.When 21 b modulates B light and 21 b does R light, 1805B and R arelighted up. When 21 a modulates R light and 21 b does G light, 453R andG are lighted up.

[1011] As shown in FIG. 177, the present invention uses the polarizingbeam splitter (PBS) 1821 in order to polarize and disperse lights withthe use of interference film (semi-dispersed layer) 1822. The PBS 1821is not limited to a solid block material but a sheet type can be used.The latter may degrade contrast in some degree, but is cheap. Instead ofPBS 1821 shown in FIG. 177, a regular beam splitter can be used. Thebeam splitter 1821 means a function to divide an optical path intoplural form, and represents a dichroic mirror, a half mirror or adichroic prism, etc.

[1012] As an application sample of FIG. 177, a permeable orsemi-permeable panel can be replaced with the panel 21. It is desirableto optically couple the PBS 1821 and the panel 21 with the couplingmaterial (layer) 1824, in order to block the light reflected at theinterface between the panel 21 and air. A prism plate may be set at theinjection surface of the panel 21 or between the backlight 1815 and thepanel 21.

[1013] The present invention used two display panels 21 as shown in FIG.177, but the number of the panel is not limited to this. More than twocan be used. As for the panel 21, DMD (digital micro mirror device)produced by Texas Instruments in U.S.A or TMA made by DAEWOO Electronicsin South Korea can be used. As the color filter, a hologram color filtercan be used. These explanations are applied to other display unit and soforth described in this statement.

[1014] All the above specifications are suitable for the case where thepanel 21 has a comparatively small display area. When the area becomeslarger to exceed 30 square inches, the screen tends to bend. As thecountermeasures, the present invention fits the outer frame 1831 withthe panel 21 using the fid 1832 to suspend the frame, as shown in F FIG.170. Using this fid 1832 and the fixing anchor such as the screw 1842 asshown in FIG. 178, the panel is be set on the wall 1841 or other place.

[1015] However, the weight of the panel 21 increases in proportion toincrease of its size. As the countermeasures, the present inventioninstalls the leg mounting part 1834 under the panel 21 so that theseveral legs 1833 can support the panel 21.

[1016] The leg 1833 is made movable sideward as illustrated in A andalso retractable as in B. This construction enables the user to set thedisplay unit with ease even in a small space.

[1017] A composite material of plastic film and metal plate (hereinafterreferred to as the composite material) is used for the leg 1833 and thecase (and also other equipment specifications described in the presentinvention). This composite material is made by powerfully bonding metaland plastic film through the special surface treatment layer (adhesivelayer). The metal plate thickness is preferably 0.2 mm and above but notover 0.8 mm. The plastic film to be bonded through the special finishinglayer on the metal plate is desirable to have thickness of 15 μm andabove, not exceeding 100 μm.

[1018] The special bonding method generates powerful adhesion betweenthe plastic and the metal plate. Utilization of this composite materialenables coloring, dyeing and printing on the plastic layer. In addition,the secondary process required for pressed parts (manual lamination ofthe film or plating) can be omitted. Moreover, deep-drawn molding and DImolding that have been traditionally impossible now become available.

[1019] The screen surface of liquid crystal television or organic ELtelevision illustrated in FIG. 170 is plated with the protective film1843 (or plate). Its main aim is to prevent the panel 21 surface frombeing damaged when something hits it. Surface of the protective film1843 is finished with AIR coating and embossed (as shown in 1556 ofFIGS. 6 and 7) in an attempt to limit reflection of surroundings(outside light) onto the panel 21.

[1020] Beads are spread between the film 1843 and the panel 21 to securea certain space. The minute convex part created on backside of the film1843 enables to maintain a space between the panel and the film. Bymaintaining these spaces, any impact to be transmitted to the panel 21from the film 1843 is restricted.

[1021] Another effective method is to distribute or inject the opticalbinding agent 1824, e.g. a liquid such as alcohol and ethylene glycol,or gel acrylic resin, or solid resin such as epoxy between the panel andthe film 1843. This also prevents interfacial reflection along with thefunction of the above-mentioned optical agent 1824 as a buffer.

[1022] Samples of the protective film 1843 include polycarbonate film(plate), acrylic film (plate), polyethetel film (plate) and PVA film(plate). Engineering resin film can of course be used and so as otherfilms composed of inorganic materials such as reinforced glass. As asubstitute for the protective film 853, coating of the panel 21 withepoxy resin, phenol resin or acrylic resin in the thickness from 0.5 μmto 2.0 μm has the same effect.

[1023] It is also effective to apply fluoric coating on the film 1843 orthe surface of the coating material,

[1024] because this makes it easier to wipe out the dirt on the surfacewith soapy water. As another option, it is good to form the film thickto be served as a front light at the same time.

[1025] The applicable aspect ratio of the screen is not restricted to. 4to 3, but that of 16 to 9 typically in a wide television is alsoacceptable. The resolution is desirable to become 1280×768 dots andabove. By taking advantage of the wide screen, the user can fully enjoyDVD movies or telecast when they are broadcast using the screen fromside to side.

[1026] It is preferable to set brightness of the display panel at 300cd/m², or more preferably, at 500 cd m². This unit is also installedwith a selector switch to change the brightness (at 200 cd/m²) suitablefor daily use of PC or the Internet. Thus, the user can select optimalbrightness of the screen depending on contents displayed or the use.

[1027] In addition, it is equipped with a setting that enables todisplay only the window showing a moving image at 500 cd/m² and otherparts at 200 cd/m². One of its flexible uses is to display a TV programat one corner of the screen while the user is checking emails. Thespeaker is designed to be vertical and to emit sound not only in thefront but also in the whole space.

[1028] Replay or tape-recording of TV programs is another improvedfeature, and the user can easily reserve and record a program viai-mode. Traditionally users needed to check the time and channel for theprogram before recording it by referring to the guide on such media asnewspaper, but it is not required any longer since the user of i-modeonly need to check them with an electronic program guide via i-mode toreserve and record. This helps the user not to miss recording justbecause they have no source to check the broadcast time. Furthermore, itis capable of replaying a recorded program in a shortened time. Itallows the user to see the outline of the program by leaving only theimportant part they want to see by selecting it from telops or sound andby skipping the part they do not require. (A 30 minute program will bereplayed in 1 to 10 minutes.)

[1029] For this tape-recording, the unit is installed with a hard diskwhose capacity is over 40 GB as well as an expansion box that has I/Oterminals for power and image. The expansion box used for connecting AVdevices such as a video recorder connects not only a PC and a TV set butalso dual system video devices. For the image input, it has a DIterminal used for a BS digital tuner as well as an S terminal, which canbe selected depending on a connected device. The terminal for AV devicesis arranged in front conveniently for the user to connect video gamemachines.

[1030] It would be more desirable to load such functions as IEEE1394(i.LINK) or the memory stick. Apart from this, it can deal withBluetooth. To use this, the user just presses the button ‘BLUETOOTH’ atthe side of the display panel for 2 seconds or more.

[1031] When the blue LED on the upper right of the main unit lights up,start the dedicated software to search devices able to be connected.When the search finishes, select the device to be used from the‘connected device panel’ on the right of the screen. Then select thecommunication method from the 9 icons displayed on the screen. Forexample, click on ‘File Push’ for communication with VAIO. Select thefile to be sent and then input the password decided for the machines inadvance.

[1032] All the above descriptions, explanation related with theprotective film 1843, case, construction, characteristics, functions,etc. are applied to other display devices (such as a mobile phone) andinformation display devices described in the present invention.

[1033] The present invention utilizes plastic to make the platform 11and 12. This enables integral molding of the spacer and the platform,omitting the molding process of spacer and achieving a great costreduction and an improved yield ratio.

[1034] Also by making the spacer trapeziform, the present invention canincrease light emission quantity to the front, which contributes toimprove brightness. Other advantages included are less heavy weight andhigher impact resistance. Also thanks to the use of plastic, the displaycan be made flexible. In addition, it enables energy saving duringmanufacturing. These are some of the many advantages the presentinvention has.

[1035] The technical theory of the present invention can certainly beadopted into the plasma addressing type display panel, along with anoptical write, a heat write and a laser write types that have no pixel.These panels can be utilized to construct projection type display units.

[1036] The mode (here referred both to a mode and a code) of the panelcan be adopted to not only PD mode but also other modes such as STN,ECB, DAP, TN, (anti) ferroelectric liquid crystal, DSM (dynamicscattering mode), vertical orientation, guest host, homeo-tropic,smectic, cholesteric. The above-mentioned specifications are applied tothe entire section of the present invention.

[1037] Application of the display panel/device specified in the presentinvention and the information display device or the drive, display andtransmission mechanism utilizing the specified theory is not limited tothe TN liquid crystal display panel. Applicable display units includethe polymer dispersion (e.g. PD liquid crystal mode) LCD whose liquidcrystal layer is composed of resin and liquid crystal component, and theSTN LCD, cholesteric LCD, DAP LCD, ECB LC mode display, IPS systemdisplay, ferroelectric LCD, ant-ferroelectric LCD, OCB LCD and others.Other units, which introduce such systems as PLZT display,electro-chromism display, electro-luminescence (EL) application display,LED display, EL display (OEL, OLED, organic EL and inorganic EL), CRTdisplay, plasma display (DPD) and plasma addressing (PALC), are alsoapplicable. The above-mentioned specifications are applied to the entiresection of the present invention.

[1038] The technical theory explained in the application samples of thepresent invention can be adopted to video cameras, LC projectors, 3-Dtelevisions or projection televisions, along with View finders, monitorsof mobile phones, PHS, hand-held devices and their monitors or digitalcameras and their monitors. Other applicable devices are electronographsystems, head mount displays, direct-view monitor displays, notebookcomputers, electro steel cameras, monitors of ATM, pay phones, picturephones, personal computers, LC wrist watches and their displays. It cancertainly be applied to or developed with LCD monitors of homeappliances, pocket game machines and their monitors or back lights fordisplay.

INDUSTRIAL APPLICABILITY

[1039] The display panel/unit specified in the present invention hascharacteristic effects such as high picture quality, low powerconsumption, lower cost, higher brightness in accordance with respectiveunit constructions.

[1040] Utilization of the present invention does not require muchelectricity because it supports to construct low-power-consumptioninformation display units. Moreover, it enables downsizing and weightsaving, which does not waste resources. In consequence, the presentinvention is friendly to the global as well the space environment.

1. A matrix type display unit having multiple scanning electrodes andmultiple signal electrodes, comprising: drive means including a scanningcircuit to drive said scanning electrodes and a signal circuit to drivesaid signal electrodes, said drive means being positioned on one side ofsaid display unit, wherein a predetermined amplitude pulse issuperimposed to a signal which is to be applied to said signalelectrodes, in synchronization with one horizontal scanning period. 2.The display unit according to claim 1, wherein the scanning circuit andthe signal circuit are formed within a single semiconductor chip.
 3. Thedisplay unit according to claim 1, wherein by selecting simultaneously Lnumber of the scanning electrodes where L is an integer greater thanone, a gradation display is made.
 4. A matrix type display unit havingmultiple scanning electrodes and multiple signal electrodes, wherein apredetermined amplitude pulse is superimposed to a signal which is to beapplied to said signal electrodes, in synchronization with onehorizontal scanning period, and wherein said pulse width is in a rangefrom 0.06 to 0.23 when the horizontal scanning period is specified tobe
 1. 5. A matrix type display unit having multiple scanning electrodesand multiple signal electrodes, comprising a pulse applying means forsuperimposing a predetermined amplitude pulse on a signal to be appliedto each of said signal electrodes in synchronization with one horizontalscanning period; and a pulse control means for changing at least one ofsaid pulse width and positions of said horizontal scanning period.
 6. Adriving method for a matrix type display unit having multiple scanningelectrodes and multiple signal electrodes, comprising: superimposing apredetermined amplitude pulse on a signal to be applied to each of saidsignal electrodes in synchronization with one horizontal scanningperiod, wherein said pulse is continuously applied during the horizontalscanning periods in odd-numbered and even-numbered order.
 7. A drivingmethod for a matrix type display unit having multiple scanningelectrodes and multiple signal electrodes and having at least, a firstpixel which modulates a first wavelength of light and a second pixelwhich modulates a second wavelength of light, said method comprising:superimposing a predetermined amplitude pulse on a signal to be appliedto each of said signal electrodes in synchronization with one horizontalscanning period, wherein a starting position of the horizontal scanningperiod of said pulse applied to said first pixel is different from astarting position of the horizontal scanning period of said pulseapplied to said second pixel.
 8. A driving method for a matrix typedisplay unit having multiple scanning electrodes and multiple signalelectrodes, comprising: superimposing a predetermined amplitude pulse ona signal to be applied to said signal electrodes in synchronization withone horizontal scanning period, wherein by changing at least one of thepulse width and pulse amplitude, a display brightness of the displayunit is varied.
 9. An information display unit having the display unitaccording to claim 1 and an audio reception or transmission means.
 10. Adisplay unit comprising: a scanning circuit selecting a scanning signalline; a signal circuit having a RAM storing image data of one screen andapplying a picture signal to a picture signal line; and an imageprocessing circuit for dither-processing or error-distributionprocessing of input image signals, wherein said image processing circuittransfers the resultant image data obtained by dither-processing orerror-distribution processing to said RAM.
 11. A display unit displayingimages by simultaneously selecting multi-scanning electrodes and throughpulse-width modulation, comprising: a segment driving circuit applying asignal to a segment signal line of said display unit; and an imageprocessing circuit generating image data processed by error distributionprocessing.
 12. A liquid crystal display unit comprising: a segmentdriver for driving a segment signal line; a common driver for driving acommon signal line; a controller having a built-in image memorysufficient for at least one screen display, wherein said controllerperforms a first operation of dither-processing or error distributionprocessing of input image data and a second operation of transferringthe resultant image data obtained by the dither processing or the errordistribution processing to said built-in memory; and operating means forswitching between execution and non-execution of the error distributionprocessing or the dither-processing.
 13. An information display unitcomprising: the display unit according to any one of claims 10, 11 and12; a receiver, and a loudspeaker.
 14. A driving method for a liquidcrystal display unit achieving gradation display by frame rate control,wherein gradation data subject to the frame rate control comprise firstgradation data and second gradation data; the first gradation data beingcomprised of common divisors of 12; the second gradation data beingcomprised of common divisors of 8; conducting the gradation display fora still-picture, using said first gradation data and said secondgradation data; and conducting the gradation display for a movingpicture, using said second gradation data.
 15. The display unitaccording to claim 13, wherein the frame rate is varied respectively atthe time of moving picture display and still-picture display.
 16. Adriving circuit for a display unit selecting simultaneously multiplecommon signal lines, comprising: a gradation data shift circuit havingmultiple gradation registers and shifting said gradation registers; anda gradation selection circuit formed in each segment signal line forselecting gradation data corresponding to image data based on the imagedata and the output data of said gradation data shift circuit; whereinat least one of the gradation registers formed by data mirror-reversalin said gradation data shift circuit is omitted, and regarding the dataof said omitted gradation registers, the data of the gradation datashift circuit is demodulated by reversing in said gradation selectioncircuit.
 17. A driving method for a display unit selectingsimultaneously multiple common signal lines, comprising: shiftinggradation data stored in registers by one frame or one field signal andone horizontal scanning signal; and selecting gradation datacorresponding to image data from said gradation data and image datathrough frame rate control using a processing circuit formed in eachsegment signal line; wherein at least one gradation data generated bydata mirror reversal in the gradation data of a gradation data shiftcircuit is omitted; and wherein said omitted gradation data isidentified by a polarity of the most significant bit of said image dataand is demodulated by reversing the gradation data.
 18. A drivingcircuit for a display unit selecting simultaneously multiple commonsignal lines, comprising: a gradation data shift circuit having multiplegradation registers and shifting said gradation registers; and agradation selection circuit formed in each segment signal line forselecting gradation data corresponding to image data based on the imagedata and the output data of said gradation data shift circuit; whereinat least one of the gradation registers formed by data mirror-reversalin said gradation data shift circuit is omitted, and regarding the dataof said omitted gradation registers, the data of the gradation datashift circuit is demodulated by reversing in said gradation selectioncircuit, and wherein the bit number of the gradation data stored in saidgradation register is 12 or 8, or a common divisor of 12 or
 8. 19. Amatrix type display unit performing multiple gradation display throughframe rate control; wherein said display unit displays 16 gradationsfrom 0 to 15 levels, and in the case where the gradation level 0 isassigned to a black display and the gradation level 15 is assigned to awhite display, the level 1 indicates that a register length is 12, andone of said 12 is ON; the level 2 indicates that a register length is 8,and one of said 8 is ON; the level 3 indicates that a register length is6, and one of said 6 is ON; the level 4 indicates that a register lengthis 4, and one of said 4 is ON; the level 5 indicates that a registerlength is 3, and one of said 3 is ON; the level 6 indicates that aregister length is 8, and three of said 8 are ON; the level 7 indicatesthat a: register length is 12, and five of said 12 are ON; the level 8indicates that a register length is 2, and one of said 2 is ON; thelevel 9 indicates that a register length is 12, and seven of said 12 areON; the level 10 indicates that a register length is 3, and two of said3 are ON; the level 11 indicates that a register length is 4, and threeof said 4 are ON; the level 12 indicates that a register length is 6,and five of said 6 are ON; the level 13 indicates that a register lengthis 8, and seven of said 8 are ON; and the level 14 indicates that aregister length is 12, and eleven of said 12 are ON.
 20. A matrix typedisplay unit performing multiple gradation display through frame ratecontrol; wherein said display unit displays 16 gradations from 0 to 15levels, and in the case where the gradation level 0 is assigned to ablack display and the gradation level 15 is assigned to a white display,the level 1 indicates that a register length is 12, and one of said 12is ON; the level 2 indicates that a register length is 8, and one ofsaid 8 is ON; the level 3 indicates that a register length is 6, and oneof said 6 is ON; the level 4 indicates that a register length is 4, andone of said 4 is ON; the level 5 indicates that a register length is 3,and one of said 3 is ON; the level 6 indicates that a register length is8, and three of said 8 are ON; the level 7 indicates that a registerlength is 12, and five of said 12 are ON; the level 8 indicates that aregister length is 2, and one of said 2 is ON; the level 9 is a mirrorconstruction of the level 7; the level 10 is a mirror construction ofthe level 5; the level 11 is a mirror construction of the level 4; thelevel 12 is a mirror construction of the level 3; the level 13 is amirror construction of the level 2; and the level 14 is a mirrorconstruction of the level 1; wherein said display unit comprising: agradation data shift circuit having multiple gradation registers whichexpress at least one gradation of the gradation levels 1 to 8 andshifting said gradation registers; and a gradation selection circuitformed in each segment signal line for selecting gradation datacorresponding to image data based on the image data and the output dataof said gradation data shift circuit; wherein at least one of thegradation registers formed by data mirror-reversal in said gradationdata shift circuit is omitted, and regarding the data of said omittedgradation registers, the data of the gradation data shift circuit isdemodulated by reversing in said gradation selection circuit.
 21. Adisplay unit comprising: a first oscillation means for generating afirst frequency; a second oscillation means for generating a secondfrequency; a frequency selection means which is adapted to select thefirst and second frequencies generated by said first and secondoscillation means, respectively; a frequency division means for dividingthe output frequencies of said frequency selection means; and a displaypanel for displaying images using the output of said frequency divisionmeans are provided, wherein when said first frequency is 100, saidsecond frequency is in a range from 70 to
 130. 22. A driving method fora display unit selecting simultaneously multiple common signal lines,said method comprising: shifting gradation data retained in registers byone frame or one field signal and one horizontal scanning signal;selecting gradation data corresponding to image data from said gradationdata and said image data through frame rate control; reversing a code ofan orthogonal function by a selection signal which selects normallywhite or normally black and a polarity shifting signal for AC driving;and selecting a voltage to be applied to segment electrodes based onsaid orthogonal function and said selected gradation data.